Design and Implementation of a Novel Intelligent Strategy for the Permanent Magnet Synchronous Motor Emulation by Hamed Zeinoddini-Meymand, Salah Kamel, Baseem Khan

“…Since online learning neural network on a chip requires a strong processor, high memory, and convergence guarantee, this article uses the offline method. …”
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Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip by William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French

“…The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC). …”
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Energy-efficient analog-domain aggregator circuit for RRAM-based neural network accelerators by Khaled Humood, Yihan Pan, Shiwei Wang, Alexander Serb, Themis Prodromakis

“…However, challenges persist in fully integrating large-scale networks onto a chip, particularly when the weights of a layer exceed the capacity of the RRAM crossbar. …”
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