Showing 41 - 60 results of 122 for search '"International Journal of Reconfigurable Computing"', query time: 0.06s Refine Results
  1. 41
    An NoC Traffic Compiler for Efficient FPGA Implementation of Sparse Graph-Oriented Workloads

    An NoC Traffic Compiler for Efficient FPGA Implementation of Sparse Graph-Oriented Workloads by Nachiket Kapre, André Dehon

    Published 2011-01-01
    “…International Journal of Reconfigurable Computing…”
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  2. 42
    AC_ICAP: A Flexible High Speed ICAP Controller

    AC_ICAP: A Flexible High Speed ICAP Controller by Luis Andres Cardona, Carles Ferrer

    Published 2015-01-01
    “…International Journal of Reconfigurable Computing…”
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  3. 43
    Reconfigurable Network Stream Processing on Virtualized FPGA Resources

    Reconfigurable Network Stream Processing on Virtualized FPGA Resources by Qianqiao Chen, Vaibhawa Mishra, Jose Nunez-Yanez, Georgios Zervas

    Published 2018-01-01
    “…International Journal of Reconfigurable Computing…”
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  4. 44
    An Efficient FPGA Implementation of Optimized Anisotropic Diffusion Filtering of Images

    An Efficient FPGA Implementation of Optimized Anisotropic Diffusion Filtering of Images by Chandrajit Pal, Avik Kotal, Asit Samanta, Amlan Chakrabarti, Ranjan Ghosh

    Published 2016-01-01
    “…International Journal of Reconfigurable Computing…”
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  5. 45
    FPGA Implementation of A∗ Algorithm for Real-Time Path Planning

    FPGA Implementation of A∗ Algorithm for Real-Time Path Planning by Yuzhi Zhou, Xi Jin, Tianqi Wang

    Published 2020-01-01
    “…International Journal of Reconfigurable Computing…”
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  6. 46
    The “Chimera”: An Off-The-Shelf CPU/GPGPU/FPGA Hybrid Computing Platform

    The “Chimera”: An Off-The-Shelf CPU/GPGPU/FPGA Hybrid Computing Platform by Ra Inta, David J. Bowman, Susan M. Scott

    Published 2012-01-01
    “…International Journal of Reconfigurable Computing…”
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  7. 47
    A Coarse-Grained Reconfigurable Architecture with Compilation for High Performance

    A Coarse-Grained Reconfigurable Architecture with Compilation for High Performance by Lu Wan, Chen Dong, Deming Chen

    Published 2012-01-01
    “…International Journal of Reconfigurable Computing…”
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  8. 48
    Efficient Scheme for Implementing Large Size Signed Multipliers Using Multigranular Embedded DSP Blocks in FPGAs

    Efficient Scheme for Implementing Large Size Signed Multipliers Using Multigranular Embedded DSP Blocks in FPGAs by Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini

    Published 2009-01-01
    “…International Journal of Reconfigurable Computing…”
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  9. 49
    Automatic Pipelining and Vectorization of Scientific Code for FPGAs

    Automatic Pipelining and Vectorization of Scientific Code for FPGAs by Syed Waqar Nabi, Wim Vanderbauwhede

    Published 2019-01-01
    “…International Journal of Reconfigurable Computing…”
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  10. 50
    Performance Modeling for FPGAs: Extending the Roofline Model with High-Level Synthesis Tools

    Performance Modeling for FPGAs: Extending the Roofline Model with High-Level Synthesis Tools by Bruno da Silva, An Braeken, Erik H. D’Hollander, Abdellah Touhafi

    Published 2013-01-01
    “…International Journal of Reconfigurable Computing…”
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  11. 51
    Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application

    Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application by Wim Vanderbauwhede, S. R. Chalamalasetti, M. Margala

    Published 2012-01-01
    “…International Journal of Reconfigurable Computing…”
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  12. 52
    XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware

    XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware by Gaurav Purohit, Kota Solomon Raju, Vinod Kumar Chaubey

    Published 2016-01-01
    “…International Journal of Reconfigurable Computing…”
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  13. 53
    FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator

    FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator by Kaiyu Wang, Zhiming Song, Xianwei Qi, Qingxin Yan, Zhenan Tang

    Published 2014-01-01
    “…International Journal of Reconfigurable Computing…”
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  14. 54
    Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions

    Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions by Bahram N. Uchevler, Kjetil Svarstad

    Published 2018-01-01
    “…International Journal of Reconfigurable Computing…”
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  15. 55
    Selected Papers from the Southern Programmable Logic Conference (SPL2010)

    Selected Papers from the Southern Programmable Logic Conference (SPL2010) by Elías Todorovich, Gustavo Sutter

    Published 2011-01-01
    “…International Journal of Reconfigurable Computing…”
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  16. 56
    A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation

    A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation by Indranil Hatai, Indrajit Chakrabarti

    Published 2011-01-01
    “…International Journal of Reconfigurable Computing…”
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  17. 57
    Leakage Immune Modified Pass Transistor Based 8T SRAM Cell in Subthreshold Region

    Leakage Immune Modified Pass Transistor Based 8T SRAM Cell in Subthreshold Region by Priya Gupta, Anu Gupta, Abhijit Asati

    Published 2015-01-01
    “…International Journal of Reconfigurable Computing…”
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  18. 58
    On a Real-Time Blind Signal Separation Noise Reduction System

    On a Real-Time Blind Signal Separation Noise Reduction System by Ka Fai Cedric Yiu, Siow Yong Low

    Published 2018-01-01
    “…International Journal of Reconfigurable Computing…”
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  19. 59
    A Workload-Adaptive and Reconfigurable Bus Architecture for Multicore Processors

    A Workload-Adaptive and Reconfigurable Bus Architecture for Multicore Processors by Shoaib Akram, Alexandros Papakonstantinou, Rakesh Kumar, Deming Chen

    Published 2010-01-01
    “…International Journal of Reconfigurable Computing…”
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  20. 60
    Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA

    Hardware-Efficient Design of Real-Time Profile Shape Matching Stereo Vision Algorithm on FPGA by Beau Tippetts, Dah Jye Lee, Kirt Lillywhite, James K. Archibald

    Published 2014-01-01
    “…International Journal of Reconfigurable Computing…”
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