Scaling Logic Area With Multitier Standard Cells by Florian Freye, Christian Lanius, Hossein Hashemi Shadmehri, Diana Gohringer, Tobias Gemmeke

“…IEEE Journal on Exploratory Solid-State Computational Devices and Circuits…”
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Evaluation of a Plasmon-Based Optical Integrated Circuit for Error-Tolerant Streaming Applications by Samantha Lubaba Noor, Xuan Wu, Dennis Lin, Pol van Dorpe, Francky Catthoor, Patrick Reynaert, Azad Naeemi

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HamFET: A High-Performance Subthermionic Transistor Through Incorporating Hybrid Switching Mechanism by Qianqian Huang, Shaodi Xu, Ru Huang

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Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations by Esteban Garzon, Alessandro Bedoya, Marco Lanuzza, Leonid Yavits

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A Chisel Generator for Standardized 3-D Die-to-Die Interconnects by Harrison Liew, Farhana Sheikh, Jong-Ru Guo, Zuoguo Wu, Borivoje Nikolic

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MESO-CMOS Hybrid Circuits With Time-Multiplexing Technique for Energy and Area-Efficient Computing in Memory by Tzuping Huang, Linran Zhao, Yiming Han, Hai Li, Ian A. Young, Yaoyao Jia

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MEFET-Based CAM/TCAM for Memory-Augmented Neural Networks by Sai Sanjeet, Jonathan Bird, Bibhu Datta Sahoo

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E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation by Saeed Seyedfaraji, Salar Shakibhamedan, Amire Seyedfaraji, Baset Mesgari, Nima Taherinejad, Axel Jantsch, Semeen Rehman

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A High-Efficiency Charge-Domain Compute-in-Memory 1F1C Macro Using 2-bit FeFET Cells for DNN Processing by Nellie Laleni, Franz Muller, Gonzalo Cunarro, Thomas Kampfe, Taekwang Jang

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Ferroelectric Transistor-Based Synaptic Crossbar Arrays: The Impact of Ferroelectric Thickness and Device-Circuit Interactions by Chunguang Wang, Sumeet Kumar Gupta

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Source Design of Vertical III–V Nanowire Tunnel Field-Effect Transistors by Gautham Rangasamy, Zhongyunshen Zhu, Lars-Erik Wernersson

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Energy-/Carbon-Aware Evaluation and Optimization of 3-D IC Architecture With Digital Compute-in-Memory Designs by Hyung Joon Byun, Udit Gupta, Jae-Sun Seo

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SpecPCM: A Low-Power PCM-Based In-Memory Computing Accelerator for Full-Stack Mass Spectrometry Analysis by Keming Fan, Ashkan Moradifirouzabadi, Xiangjin Wu, Zheyu Li, Flavio Ponzina, Anton Persson, Eric Pop, Tajana Rosing, Mingu Kang

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Special Topic on 3-D Logic and Memory for Energy Efficient Computing by editorial

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Heterogeneous Integration Technologies for Artificial Intelligence Applications by Madison Manley, Ashita Victor, Hyunggyu Park, Ankit Kaul, Mohanalingam Kathaperumal, Muhannad S. Bakir

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Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories by Piyush Kumar, Da Eun Shim, Siri Narla, Azad Naeemi

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CMOS Single-Photon Avalanche Diode Circuits for Probabilistic Computing by William Whitehead, Wonsik Oh, Luke Theogarajan

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Design Considerations for Sub-1-V 1T1C FeRAM Memory Circuits by Mohammad Adnaan, Sou-Chi Chang, Hai Li, Yu-Ching Liao, Ian A. Young, Azad Naeemi

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Toward Fine-Grained Partitioning of Low-Level SRAM Caches for Emerging 3D-IC Designs by Sudipta Das, Bhawana Kumari, Siva Satyendra Sahoo, Yukai Chen, James Myers, Dragomir Milojevic, Dwaipayan Biswas, Julien Ryckaert

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Co-Optimization of Power Delivery Network Design for 3-D Heterogeneous Integration of RRAM-Based Compute In-Memory Accelerators by Madison Manley, James Read, Ankit Kaul, Shimeng Yu, Muhannad Bakir

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