Showing 501 - 520 results of 988 for search '"Circuit design', query time: 0.05s Refine Results
  1. 501

    A Readout Scheme for PCM-Based Analog In-Memory Computing With Drift Compensation Through Reference Conductance Tracking by Alessio Antolini, Andrea Lico, Francesco Zavalloni, Eleonora Franchi Scarselli, Antonio Gnudi, Mattia Luigi Torres, Roberto Canegallo, Marco Pasotti

    Published 2024-01-01
    “…Accuracy drop due to circuits mismatch and variability involved in the computational chain are minimized with an optimized iterative program-and-verify algorithm applied to the phase-change memory (PCM) devices. …”
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    Article
  2. 502

    SRAM and Mixed-Signal Logic With Noise Immunity in 3-nm Nano-Sheet Technology by Rajiv V. Joshi, J. Frougier, Alberto Cestero, Crystal Castellanos, Sudipto Chakraborty, Carl Radens, M. Silvestre, S. Lucarini, I. Ahsan, E. Leobandung

    Published 2025-01-01
    “…A modular 4.26 Mb SRAM based on a 82 Kb/block structure with mixed signal logic is fabricated, characterized, and demonstrated with full functionality in a 3-nm nanosheet (NS) technology. Designed macros utilize new circuits for supply boosting, read, and write assist techniques. …”
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    Article
  3. 503

    E-MAC: Enhanced In-SRAM MAC Accuracy via Digital-to-Time Modulation by Saeed Seyedfaraji, Salar Shakibhamedan, Amire Seyedfaraji, Baset Mesgari, Nima Taherinejad, Axel Jantsch, Semeen Rehman

    Published 2024-01-01
    “…This eliminates the need for an additional digital-to-analog converter (DAC) in the design. Furthermore, the SRAM-based logical weight encoding scheme we present reduces the reliance on capacitance-based techniques, which typically introduce area overhead in the circuit. …”
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    Article
  4. 504

    Accuracy Improvement With Weight Mapping Strategy and Output Transformation for STT-MRAM-Based Computing-in-Memory by Xianggao Wang, Na Wei, Shifan Gao, Wenhao Wu, Yi Zhao

    Published 2024-01-01
    “…Specialized peripheral circuits were designed for the current-scheme CiM architecture. …”
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    Article
  5. 505
  6. 506

    COUNTERREENGINEERING OF ELECTRONIC DEVICES by M. S. Kostin, D. S. Vorunichev, D. A. Korzh

    Published 2019-02-01
    “…The basic process design for the reengineering of multilayer printed circuits of radioelectronic products is presented. …”
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    Article
  7. 507

    A 0.8 V 0.23 nW 1.5 ns Full-Swing Pass-Transistor XOR Gate in 130 nm CMOS by Nabihah Ahmad, Rezaul Hasan

    Published 2013-01-01
    “…The XOR gate utilizes six transistors to achieve a compact circuit design and was fabricated using the 130 nm IBM CMOS process. …”
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    Article
  8. 508

    Fast Attitude Maneuver of a Flexible Spacecraft with Passive Vibration Control Using Shunted Piezoelectric Transducers by Bassam A. Albassam

    Published 2019-01-01
    “…The attitude control torque is produced using either the reaction wheels contained inside the rigid hub or jet thrusters mounted outside it. The control design process starts with deriving the nonlinear partial differential equations of motion for the spacecraft using Hamilton’s principle which accounts for the electromechanical coupling and the presence of resistive or resistive-inductive circuits. …”
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    Article
  9. 509

    CRLH Transmission Lines for Telecommunications: Fast and Effective Modeling by Juanjuan Gao, Guizhen Lu

    Published 2017-01-01
    “…The responses of distributed prototype and extracted equivalent LC circuit model are in good agreement. The equivalent circuit modeling can improve the degree of freedom in the CRLH TLs design. …”
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    Article
  10. 510

    Passive On-Chip Components for Fully Integrated Silicon RF VCOs by Aristides Kyranas, Yannis Papananos

    Published 2002-01-01
    “…The operation of on-chip inductors and variable capacitors is outlined along with simple electrical equivalent circuits suitable for hand calculations. Design examples of passive devices operating at 5 and 6 GHz in a commercial HBT BiCMOS process are also presented. …”
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    Article
  11. 511

    Low-power artificial neuron networks with enhanced synaptic functionality using dual transistor and dual memristor. by Keerthi Nalliboyina, Sakthivel Ramachandran

    Published 2025-01-01
    “…The suggested circuit employs memristor-based artificial neurons with Dual Transistor and Dual Memristor (DTDM) synapse circuit. …”
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    Article
  12. 512

    Optimization of Intelligent Management System for Crafts Production Based on Internet of Things by Xiaojiang Zhou, Keqi Li

    Published 2021-01-01
    “…The design and implementation of the system hardware are introduced by focusing on the functional circuits of various sensors of the data collection terminal, The functional circuit of the wireless communication module CC2530, the functional circuit of the microprocessor STM32, and the functional circuit of the collection terminal. …”
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    Article
  13. 513

    Magnetic Behavior of Sintered NdFeB Magnets on a Long-Term Timescale by Minna Haavisto, Sampo Tuominen, Timo Santa-Nokki, Harri Kankaanpää, Martti Paju, Pekka Ruuskanen

    Published 2014-01-01
    “…Open-circuit tests seem to give bigger losses than closed-circuit tests in cases where the permeance coefficient of the open-circuit sample is considered to be the average permeance coefficient, calculated according to the dimensions of the magnet.…”
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    Article
  14. 514

    Study on Single Event Upset and Mitigation Technique in JLTFET-Based 6T SRAM Cell by Aishwarya K, Lakshmi B

    Published 2024-01-01
    “…The effect of single event transient (SET) on 6T SRAM cell employing a 20 nm silicon-based junctionless tunneling field effect transistor (JLTFET) is explored for the first time. JLTFET-based SRAM circuit is designed using the look up table-based Verilog A code obtained from TCAD values of the device. …”
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    Article
  15. 515

    A Glitch-Free Novel DET-FF in 22 nm CMOS for Low-Power Application by Sumitra Singar, N. K. Joshi, P. K. Ghosh

    Published 2018-01-01
    “…The low-power glitch-free novel dual edge triggered flip-flop (DET-FF) design is proposed in this paper. Still now, existing DET-FF designs are constructed by using either C-element circuit or 1P-2N structure or 2P-1N structure, but the proposed novel design is designed by using the combination of C-element circuit and 2P-1N structure. …”
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    Article
  16. 516
  17. 517

    Power analysis-resistant based on NCL path balance by Fang LUO, Qing-yu OU, Xiao-ping WU

    Published 2013-08-01
    “…Because of the insufficient research on the essence and the design technique of the path balance structure, the experience of the designer is severely relied on, so it can't be applied in kinds of automatization synthesis techniques. …”
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    Article
  18. 518

    Macromodel of Precise Signal-Phase Meter by Matej Šalamon, Bojan Jarc

    Published 2012-01-01
    “…It has been developed as a support tool during the design process of a signal-conditioning circuit for incremental position encoders. …”
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    Article
  19. 519

    Improvement in Brightness Uniformity by Compensating for the Threshold Voltages of Both the Driving Thin-Film Transistor and the Organic Light-Emitting Diode for Active-Matrix Orga... by Ching-Lin Fan, Hao-Wei Chen, Hui-Lung Lai, Bo-Liang Guo, Bohr-Ran Huang

    Published 2014-01-01
    “…This paper proposes a novel pixel circuit design and driving method for active-matrix organic light-emitting diode (AM-OLED) displays that use low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) as driving element. …”
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    Article
  20. 520

    Research on Time-dependent Reliability of Subway Gearboxes Based on the Response Surface Method by Pei Bang, Li Zhiyuan, Li Xuefei, Chen Zhuo, He Penghui, Huang Xiaodan

    Published 2023-02-01
    “…The operation process of subway includes start-up, continuity, high-speed and short circuit conditions. In short circuit conditions, the box body has the maximum stress and the lowest reliability. …”
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    Article