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    An Ultra-Low-Power Static Contention-Free 25-Transistor True Single-Phase-Clocked Flip-Flop in 55 nm CMOS

    An Ultra-Low-Power Static Contention-Free 25-Transistor True Single-Phase-Clocked Flip-Flop in 55 nm CMOS by Jiliang Liu, Huidong Zhao, Zhi Li, Kangning Wang, Shushan Qiao

    Published 2024-01-01
    Subjects: “…CMOS digital circuits…”
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