Operational Simulation of LC Ladder Filter Using VDTA by Praveen Kumar, Neeta Pandey, Sajal Kumar Paul

“…PSPICE simulation using 180 nm CMOS technology parameter is carried out to verify the functionality of the presented approach. …”
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Vertical Silicon Nanowire Platform for Low Power Electronics and Clean Energy Applications by D.-L. Kwong, X. Li, Y. Sun, G. Ramanathan, Z. X. Chen, S. M. Wong, Y. Li, N. S. Shen, K. Buddharaju, Y. H. Yu, S. J. Lee, N. Singh, G. Q. Lo

“…Under clean energy harvesting area, vertical wires could provide (1) cost reduction in photovoltaic energy conversion through enhanced light trapping and (2) a fully CMOS compatible thermoelectric engine converting waste-heat into electricity. …”
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Single-Input Four-Output Current Mode Filter Using Operational Floating Current Conveyor by Neeta Pandey, Deva Nand, Zubair Khan

“…The functionality of the proposed circuit is demonstrated through SPICE simulations using 0.5 µm CMOS process model provided by MOSIS (AGILENT).…”
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Divide-by-Three Injection-Locked Frequency Dividers with Direct Forcing Signal by Antonio Buonomo, Alessandro Lo Schiavo

“…The derived results are shown to be very close to SPICE simulations for a 0.13 um RF-CMOS process.…”
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Single CDTA-Based Current Mode All-Pass Filter and Its Applications by Neeta Pandey, Sajal K. Paul

“…The functionality of the circuit is verified with SPICE simulation using 0.35  𝜇 m TSMC CMOS technology parameters.…”
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Hardware Architecture for Real-Time Computation of Image Component Feature Descriptors on a FPGA by Abdul Waheed Malik, Benny Thörnberg, Muhammad Imran, Najeem Lawal

“…In the proposed architecture, the hardware modules for component labeling and feature calculation run in parallel. A CMOS image sensor (MT9V032), operating at a maximum clock frequency of 27 MHz, was used to capture the images. …”
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Differential Difference Current Conveyor Transconductance Amplifier: A New Analog Building Block for Signal Processing by Neeta Pandey, Sajal K. Paul

“…The proposed block is implemented using 0.25 μm TSMC CMOS technology. Some of the applications are presented using the proposed DDCCTA, namely, a voltage mode multifunction filter, a current mode universal filter, an oscillator, current and voltage amplifiers, and grounded inductor simulator. …”
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Design of low power and high speed FFT/IFFT processor for UWB system by LIU Liang, WANG Xue-jing, YE Fan, REN Jun-yan

“…A new 128/64-point FFT/IFFT processor used in Ultra-Wide-Band（UWB） system was presented.The proces-sor,which is based on 8×8×2 mixed radix algorithm,can deal with multiple inputs more efficiently for MIMO applica-tions.A new eight-path-feedback structure,which can provide a higher throughput and lower power dissipation,was proposed.The test chip has been fabricated using SMIC 0.13μm single-poly and eight-metal CMOS process with a core area of 1.44mm2.The throughput of this chip is up to 1Gsample/s,and the power dissipation is 39.6mW when it works at the throughput of 500Msample/s which meets the UWB standard.This chip reduces 40% of core area and saves 45% of power dissipation compared with those existing 128-point FFT processors.…”
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Recent Progress of Silicon Photonics for Middle-Infrared Application by Haowen Shu, Zhaotang Su, Xingjun Wang, Zhiping Zhou

“…“Capacity Crunch”in NIR field needs to be forestalled since the pressure of information transmission，processing and storage is continually growing.Silicon photonics，with compatibility of CMOS，compact structure and low fabrication cost，shows its superiority in the field of mid-IR transmission and signal processing.Thus a lead forward is excepted to be realized in large-scale integration of mid-IR devices and nonlinear optical and other field.The strengths and challenge of silicon photonics in mid-IR application were estimated firstly.Then some“building block”components of silicon photonics in mid-IR（waveguides，beam splitter/combiner，diode，etc）were introduced.Achievements of devices （nonlinear optical devices based on FWM，frequency comb in sensing field and laser，modulator，detector in communication field）within the last five years were presented.Finally，the conclusion was made for recent research progress.…”
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A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique by Trong-Tu Bui, Tadashi Shibata

“…The prototype circuit was designed and fabricated in a 0.18 μm CMOS technology. It consumes only 132.3 μW for an eight-input demonstration case.…”
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Investigation of an Autofocusing Method for Visible Aerial Cameras Based on Image Processing Techniques by Zhichao Chen, Tao Zhang

“…The proposed autofocusing system is designed and implemented using two CMOS detectors. The experiment results showed that the proposed method met the aviation camera focusing accuracy requirement, and a maximum focusing error of less than half of the focus depth is achieved. …”
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Fully Integrated Chen Chaotic Oscillation System by Ziyi Ouyang, Jie Jin, Fei Yu, Long Chen, Lei Ding

“…Unlike the conventional breadboard-based Chen chaotic system using off-the-shelf discrete components, the fully integrated Chen chaotic oscillation circuit presented in this paper is realized using GlobalFoundries’ 0.18 μm CMOS 1P6M process, and all the circuit components are integrated in a chip. …”
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A ± 1.55ppm Stable FBAR Reference Clock with Oven-Controlled Temperature Compensation by Jabeom Koo, Kannan Sankaragomathi, Richard Ruby, Brian Otis

“…The highly integrated system includes a 0.64mm2 FBAR chip with integrated heater and sensor resistors and a 3 mm2 CMOS chip with the control electronics. The oscillator achieves an Allen deviation of 4ppb enabled by a temperature-to-digital converter (TDC) with a 150uK resolution. …”
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Design and simulation of a tunable frequency OTA -C Chebyshev filter by JIANG Jin-guang, WANG Yao-nan

“…A new transconductor operational amplifier（OTA） using active resistor of source degeneration was presented.The method was developed through acting differential pair degenerated by two MOSFET operating in the triode region as active resistor in its input stage,the circuit was designed in working in stable quiescent operating point with folded cas-cade output stage using voltage common-mode feedback（CMFB） circuit.As an tunable cutoff frequency fourth order Chebyshev lowpass filter,an accurately tunable Gm of OTA was used,which employed switching capacitor technique to tune Gm value.Simulated results show that the practical frequency response of the filter is very near to that of idealized prototype by applying 2-poly 4-metal 3.3V power supply 0.35μm CMOS technology spice model.…”
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Mechanism of Threshold Voltage Instability in Double Gate α-IGZO Nanosheet TFT Under Bias and Temperature Stress by Muhammad Aslam, Shu-Wei Chang, Yi-Ho Chen, Yao-Jen Lee, Yiming Li, Wen-Hsi Lee

“…ABSTRACT Amorphous indium gallium zinc oxide (a-IGZO)-based thin film transistors (TFTs) are increasingly becoming popular because of their potential in futuristic applications, including CMOS technology. Given the demand for CMOS-compatible, ultra-scaled, reliable, and high-performing devices, we fabricate and analyze scaled-channel a-IGZO-TFTs with an optimal double-gate structure, a thin nanosheet-based channel, and an effective high- <inline-formula> <tex-math notation="LaTeX">$\kappa$ </tex-math></inline-formula> dielectric namely HfO2. …”
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Heterogeneous integration of amorphous silicon carbide on thin film lithium niobate by Zizheng Li, Naresh Sharma, Bruno Lopez-Rodriguez, Roald van der Kolk, Thomas Scholte, Hugo Voncken, Jasper van der Boom, Simon Gröblacher, Iman Esmaeil Zadeh

“…Despite numerous demonstrations of high-performance LN photonics, processing lithium niobate remains challenging and suffers from incompatibilities with standard complementary metal–oxide–semiconductor (CMOS) fabrication lines, limiting its scalability. …”
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Characteristics and Breakdown Behaviors of Polysilicon Resistors for High Voltage Applications by Xiao-Yu Tang, Ke Dong

“…With the rapid development of the power integrated circuit technology, polysilicon resistors have been widely used not only in traditional CMOS circuits, but also in the high voltage applications. …”
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Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures by Francesca Palumbo, Tiziana Fanni, Carlo Sau, Paolo Meloni, Luigi Raffo

“…Experimental results, on 90 and 45 nm CMOS technologies, demonstrate that the proposed approach guides the designer towards optimal implementation.…”
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Novel level shifter based physical unclonable function circuit design by Lijuan HAN, Lei QIAN, Enyi YAO, Xin LOU, Yuan CAO, Yanhua LIU

“…Level shifters are widely used in low-power, multi-threshold integrated circuit chips.A novel physical unclonable function (PUF) design based on cross-coupled level shifter was proposed.In this work, a single switching transistor was inserted in the level shifter, which was the only overhead per response bit to change the operation mode of the cross-coupled level shifter from differential to common.The signature of the PUF was extracted while in common mode, by exploiting the uncertainty of the output voltage due to the difference of the switching time of the two PMOS in the cross-coupled network.Simulated with a standard 65 nm CMOS process, the results show the proposed PUF can produce a uniqueness of 49.11% and a reliability of 96.09% with the power supply voltage ranged from 1.0 V to 1.5 V and 95.31% with the temperature ranged from -20 ℃ to 100 ℃.The energy per bit is only 0.72 pJ at a high throughput of 20 Mbit/s (1.2 V, 27 ℃).…”
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Fully Integrated Memristor and Its Application on the Scroll-Controllable Hyperchaotic System by Jie Jin, Li Cui

“…The fully integrated memristor and memristor-based hyperchaotic system are verified with the GlobalFoundries’ 0.18 μm CMOS process using Cadence IC Design Tools. The postlayout simulation results demonstrate that the memristor-based fully integrated hyperchaotic system consumes 90.5 mW from ±2.5 V supply voltage and it takes a compact chip area of 1.8 mm2.…”
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