Showing 81 - 100 results of 198 for search '"CMOS"', query time: 0.06s Refine Results
  1. 81

    A dive into the marketing trends of 2024: insights to unlocking potential by Vladimir Zhechev

    Published 2024-03-01
    “…Various leading marketing agencies have dedicated great deal of research and analytical effort to produce reports including noteworthy marketing trends that can aid CMOs in dealing with the dynamics of the landscape. …”
    Get full text
    Article
  2. 82

    Analysis and Verilog-A Modeling of Floating-Gate Transistors by Sayma Nowshin Chowdhury, Matthew Chen, Sahil Shah

    Published 2025-01-01
    “…Floating-gate transistors provide non-volatile analog storage in standard CMOS processes and are crucial in the development of reconfigurable Systems on Chips (SoCs), programmable analog structures, analog neural networks, and mixed-signal neuromorphic circuits. …”
    Get full text
    Article
  3. 83

    Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication by Ahmed Alzahmi

    Published 2025-01-01
    “…The proposed multi-band I/O (MBI) interface utilizes 3D integration, for two radio frequency band transceivers, and a CMOS driver with resistive feedback for the baseband (BB) transceiver. …”
    Get full text
    Article
  4. 84

    Wafer-Level Characterization and Monitoring Platform for Single-Photon Avalanche Diodes by Samuel Parent, Frederic Vachon, Valerie Gauthier, Steve Lamoureux, Alexandre Paquette, Jacob Deschamps, Tommy Rossignol, Nicolas Roy, Philippe Arsenault, Henri Dautet, Serge A. Charlebois, Jean-Francois Pratte

    Published 2024-01-01
    “…This is especially true for the development of SPAD arrays 3D integrated with CMOS readout electronics, where SPAD testing is required to qualify the process, independently from the final CMOS readout circuit. …”
    Get full text
    Article
  5. 85

    Multilayer magnetic skyrmion devices for spiking neural networks by Aijaz H Lone, Daniel N Rahimi, Hossein Fariborzi, Gianluca Setti

    Published 2025-01-01
    “…Additionally, the LIF neuron latency is in ns; thus, when integrated with the CMOS, the proposed device structures and associated systems exhibit an excellent future for energy-efficient neuromorphic computing.…”
    Get full text
    Article
  6. 86

    Current Mode Full-Wave Rectifier Based on a Single MZC-CDTA by Neeta Pandey, Rajeshwari Pandey

    Published 2013-01-01
    “…The functionality of the circuit is verified with SPICE simulation using 0.35 μm TSMC CMOS technology parameters.…”
    Get full text
    Article
  7. 87

    Passive On-Chip Components for Fully Integrated Silicon RF VCOs by Aristides Kyranas, Yannis Papananos

    Published 2002-01-01
    “…Design examples of passive devices operating at 5 and 6 GHz in a commercial HBT BiCMOS process are also presented. The parallel resonator quality factor is computed as a function of inductor L capacitor C and their respective losses RSL and RSC .…”
    Get full text
    Article
  8. 88

    Cascadable Current-Mode First-Order All-Pass Filter Based on Minimal Components by Jitendra Mohan, Sudhanshu Maheshwari

    Published 2013-01-01
    “…The theoretical results are verified using PSPICE simulation program with TSMC 0.35 μm CMOS process parameters.…”
    Get full text
    Article
  9. 89

    Gm-Realization of Controlled-Gain Current Follower Transconductance Amplifier by Worapong Tangsrirat

    Published 2013-01-01
    “…The circuit is designed and analyzed in 0.35 μm TSMC CMOS technology. Simulation results for the circuit with ±1.25 V supply voltages show that it consumes only 0.43 mw quiescent power with 70 MHz bandwidth. …”
    Get full text
    Article
  10. 90

    Static Switching Dynamic Buffer Circuit by A. K. Pandey, R. A. Mishra, R. K. Nagaria

    Published 2013-01-01
    “…Simulation is done using 0.18 µm CMOS technology. We have calculated the power consumption, delay, and power delay product of the proposed circuit and compared the results with the existing circuits for different logic function, loading condition, clock frequency, temperature, and power supply. …”
    Get full text
    Article
  11. 91

    VM and CM Universal Filters Based on Single DVCCTA by Neeta Pandey, Sajal K. Paul

    Published 2011-01-01
    “…SPICE simulation using 0.25 μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.…”
    Get full text
    Article
  12. 92

    Operational Simulation of LC Ladder Filter Using VDTA by Praveen Kumar, Neeta Pandey, Sajal Kumar Paul

    Published 2017-01-01
    “…PSPICE simulation using 180 nm CMOS technology parameter is carried out to verify the functionality of the presented approach. …”
    Get full text
    Article
  13. 93

    Vertical Silicon Nanowire Platform for Low Power Electronics and Clean Energy Applications by D.-L. Kwong, X. Li, Y. Sun, G. Ramanathan, Z. X. Chen, S. M. Wong, Y. Li, N. S. Shen, K. Buddharaju, Y. H. Yu, S. J. Lee, N. Singh, G. Q. Lo

    Published 2012-01-01
    “…Under clean energy harvesting area, vertical wires could provide (1) cost reduction in photovoltaic energy conversion through enhanced light trapping and (2) a fully CMOS compatible thermoelectric engine converting waste-heat into electricity. …”
    Get full text
    Article
  14. 94

    Single-Input Four-Output Current Mode Filter Using Operational Floating Current Conveyor by Neeta Pandey, Deva Nand, Zubair Khan

    Published 2013-01-01
    “…The functionality of the proposed circuit is demonstrated through SPICE simulations using 0.5 µm CMOS process model provided by MOSIS (AGILENT).…”
    Get full text
    Article
  15. 95

    Divide-by-Three Injection-Locked Frequency Dividers with Direct Forcing Signal by Antonio Buonomo, Alessandro Lo Schiavo

    Published 2013-01-01
    “…The derived results are shown to be very close to SPICE simulations for a 0.13 um RF-CMOS process.…”
    Get full text
    Article
  16. 96

    Single CDTA-Based Current Mode All-Pass Filter and Its Applications by Neeta Pandey, Sajal K. Paul

    Published 2011-01-01
    “…The functionality of the circuit is verified with SPICE simulation using 0.35  𝜇 m TSMC CMOS technology parameters.…”
    Get full text
    Article
  17. 97

    Hardware Architecture for Real-Time Computation of Image Component Feature Descriptors on a FPGA by Abdul Waheed Malik, Benny Thörnberg, Muhammad Imran, Najeem Lawal

    Published 2014-01-01
    “…In the proposed architecture, the hardware modules for component labeling and feature calculation run in parallel. A CMOS image sensor (MT9V032), operating at a maximum clock frequency of 27 MHz, was used to capture the images. …”
    Get full text
    Article
  18. 98

    Differential Difference Current Conveyor Transconductance Amplifier: A New Analog Building Block for Signal Processing by Neeta Pandey, Sajal K. Paul

    Published 2011-01-01
    “…The proposed block is implemented using 0.25 μm TSMC CMOS technology. Some of the applications are presented using the proposed DDCCTA, namely, a voltage mode multifunction filter, a current mode universal filter, an oscillator, current and voltage amplifiers, and grounded inductor simulator. …”
    Get full text
    Article
  19. 99

    A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique by Trong-Tu Bui, Tadashi Shibata

    Published 2013-01-01
    “…The prototype circuit was designed and fabricated in a 0.18 μm CMOS technology. It consumes only 132.3 μW for an eight-input demonstration case.…”
    Get full text
    Article
  20. 100

    Investigation of an Autofocusing Method for Visible Aerial Cameras Based on Image Processing Techniques by Zhichao Chen, Tao Zhang

    Published 2016-01-01
    “…The proposed autofocusing system is designed and implemented using two CMOS detectors. The experiment results showed that the proposed method met the aviation camera focusing accuracy requirement, and a maximum focusing error of less than half of the focus depth is achieved. …”
    Get full text
    Article