Identificación de áreas inundables del parque provincial San Cayetano (Corrientes, Argentina) by Laura Fabiana Gómez, Félix Ignacio Contreras, David Ezequiel Morel, Joaquín Emanuel Morel

“…Para concretar este objetivo se realizaron en primera instancia mediciones de Puntos de Apoyo Fotogramétricos (PAF) con un receptor GNSS geodésico South Galaxy G1 para otorgar mayor confiabilidad a los resultados generados en la etapa de postproceso y se sobrevoló el Parque San Cayetano con un Drone modelo Mavic 2 pro de la firma DJI, que cuenta con un sensor CMOS de 1” y resolución de 20 megapíxeles, lo que posibilitó la obtención de fotografías aéreas con características necesarias para la generación de un MDE. …”
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Design of High Performance Hybrid Type Digital-Feedback Low Drop-Out Regulator Using SSCG Technique by Muhammad Asif, Imran Ali, Danial Khan, Muhammad Riaz Ur Rehman, Younggun Pu, Sang-Sun Yoo, Kang-Yoon Lee

“…The proposed circuit is designed using CMOS 55 nm process. The input voltage range is from 0.8 ~ 1.5 V and the measured output voltage range is 0.756 ~ 1.456 V. …”
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Millimeter-Wave All-Digital Phase-Locked Loop Using Reference Waveform Oversampling Techniques by Teerachot Siriburanon, Chunxiao Liu, Jianglin Du, Robert Bogdan Staszewski

“…The proposed ADPLL is implemented in TSMC 28-nm LP CMOS. The prototype generates a 24–31-GHz output carrier with rms jitter of 237 fs while consuming only 12 mW. …”
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Heads-Up 3D Surgery under Low Light Intensity Conditions: New High-Sensitivity HD Camera for Ophthalmological Microscopes by Celso Soiti Matsumoto, Masayuki Shibuya, Jun Makita, Takuhei Shoji, Hisato Ohno, Kei Shinoda, Harue Matsumoto

“…The luminance of the images observed through the eyepieces of the operating microscope and the image of a 3D system created by a high-sensitivity sensor Exmor R 3CMOS HD camera (Sony MCC-1000MD) were measured. Results. …”
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Design Simulation and Preparation of White OLED Microdisplay Based on Microcavity Structure Optimization by Liangfei Duan, Guanghua Wang, Yu Duan, Denglin Lei, Fuli Qian, Qiming Yang

“…The optimized OLED microdisplay structure is Si(CMOS)/ITO (35 nm)/MoO3 (2 nm)/CuPc (5 nm)/2-TNATA (20 nm)/NPB (10 nm)/NPB : rubrene (1.5%)ADN : DSA-Ph (5%) (25 nm)/TPBi (15 nm)/Alq3 (1.2 nm)/Mg (13 nm) : Ag (1%). …”
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Ferroelectric Transistor-Based Synaptic Crossbar Arrays: The Impact of Ferroelectric Thickness and Device-Circuit Interactions by Chunguang Wang, Sumeet Kumar Gupta

“…Ferroelectric transistors (FeFETs)-based crossbar arrays have shown immense promise for computing-in-memory (CiM) architectures targeted for neural accelerator designs. Offering CMOS compatibility, nonvolatility, compact bit cell, and CiM-amenable features, such as multilevel storage and voltage-driven conductance tuning, FeFETs are among the foremost candidates for synaptic devices. …”
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Neuronal Multi Unit Activity Processing with Metal Oxide Memristive Devices by Caterina Sbandati, Xiongfei Jiang, Deepika Yadav, Spyros Stathopoulos, Dana Cohen, Alex Serb, Shiwei Wang, Themis Prodromakis

“…Furthermore, towards the integration of MIS with silicon chips, it is shown that it can reduce total system power consumption to below 1 µW, as RRAM encoding stage relaxes the signal preservation and noise requirements that challenge traditional complementary metal‐oxide‐semiconductor (CMOS) front‐ends. This eMUA‐MIS adaptation offers a viable pathway for developing more scalable and efficient BMIs for clinical use.…”
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Conteo de bacterias y levaduras en imágenes digitales by Jorge Peña Martín, Yelenys Alvarado Capó, Rubén Orozco Morales, Tatiana Pichardo, Ailet Abreu López

“…<br /><strong>Métodos:</strong> el sensor empleado para la toma de imágenes de las muestras fue una cámara digital modelo HDCE-X, con un sensor CMOS de ½", con una resolución de 2592 píxeles por 1944 píxeles (5 Mp). …”
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Temperature-Dependent Hydrogen Modulations of Ultra-Scaled a-IGZO Thin Film Transistor Under Gate Bias Stress by Muhammad Aslam, Shu-Wei Chang, Min-Hui Chuang, Yi-Ho Chen, Yao-Jen Lee, Yiming Li

“…Recently, a-IGZO has advanced toward the next-generation electronics system because of its compatibility with complementary metal oxide semiconductor (CMOS) and back-end-of-line (BOEL) based systems. …”
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Athermal Tantalum Pentoxide Mach-Zehnder Interferometers Based on Structural Compensation Method by Mingjian You, Zhenyu Liu, Weiren Cheng, Xingyu Tang, Ning Ding, Zhengqi Li, Min Wang, Li Shen, Qiancheng Zhao

“…This work proves the effectiveness of structural compensation method on an already low thermo-optic photonic platform, paving the way towards realization of ultra-athermal integrated optical filters in a low-loss and CMOS-compatible platform.…”
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A Run-Time Reconfigurable Ge Field-Effect Transistor With Symmetric On-States by Andreas Fuchsberger, Lukas Wind, Daniele Nazzari, Larissa Kuhberger, Daniel Popp, Johannes Aberl, Enrique Prado Navarrete, Moritz Brehm, Lilian Vogl, Peter Schweizer, Sebastian Lellig, Xavier Maeder, Masiar Sistani, Walter M. Weber

“…Notably, the obtained Al-Si-Ge multi-heterojunction reconfigurable transistors constitute the first CMOS compatible platform to combine efficient polarity control enabling the envisioned performance enhancements of Ge based reconfigurable transistors.…”
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A Small-Area 2nd-Order Adder-Less Continuous-Time &#x0394;&#x03A3; Modulator With Pulse Shaping FIR DAC for Magnetic Sensing by Manish Srivastava, Alessandro Ferro, Aleksandr Sidun, Jose M. De La Rosa, Kilian O'Donoghue, Padraig Cantillon-Murphy, Daniel O'Hare

“…The circuit has been designed in 65-nm CMOS technology, achieving a peak 82-dB SNDR and 91-dB DR within a signal bandwidth of 20 kHz and the CT<inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula> consumes <inline-formula> <tex-math notation="LaTeX">$300 ~\mu \text{W}$ </tex-math></inline-formula> of power when clocked at 10.24 MHz. …”
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Volumetric trans-scale imaging of massive quantity of heterogeneous cell populations in centimeter-wide tissue and embryo by Taro Ichimura, Taishi Kakizuka, Yoshitsugu Taniguchi, Satoshi Ejima, Yuki Sato, Keiko Itano, Kaoru Seiriki, Hitoshi Hashimoto, Ko Sugawara, Hiroya Itoga, Shuichi Onami, Takeharu Nagai

“…Using a custom-made giant lens system with a magnification of ×2 and a numerical aperture (NA) of 0.25, and a CMOS camera with more than 100 megapixels, we built a trans-scale scope AMATERAS-2, and realized fluorescence imaging with a transverse spatial resolution of approximately 1.1 µm across an FOV of approximately 1.5×1.0 cm2. …”
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A High Performance Adaptive Digital LDO Regulator With Dithering and Dynamic Frequency Scaling for IoT Applications by Muhammad Asif, Imran Ali, Danial Khan, Muhammad Riaz Ur Rehman, Qurat- Ul-Ain, Muhammad Basim, Young Gun Pu, Minjae Lee, Keum Cheol Hwang, Youngoo Yang, Kang-Yoon Lee

“…The proposed circuit is implemented in 28 nm CMOS process and occupies 0.016 mm² chip area.…”
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An Ultra-Low Power, Adaptive All-Digital Frequency-Locked Loop With Gain Estimation and Constant Current DCO by Imran Ali, Hamed Abbasizadeh, Muhammad Riaz Ur Rehman, Muhammad Asif, Seong Jin Oh, Young Gun Pu, Minjae Lee, Keum Cheol Hwang, Youngoo Yang, Kang-Yoon Lee

“…The proposed design is integrated in an ADPLL for BLE transceiver and it is fabricated with 1P6M TSMC 55 nm CMOS technology. The all-digital adaptive FLL is fully synthesizable and its area is <inline-formula> <tex-math notation="LaTeX">$1800~\mu \text{m}^{2}$ </tex-math></inline-formula> with 1.233 K gate count. …”
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An Ultra-Low-Power 2.4 GHz All-Digital Phase-Locked Loop With Injection-Locked Frequency Multiplier and Continuous Frequency Tracking by Muhammad Riaz Ur Rehman, Arash Hejazi, Imran Ali, Muhammad Asif, Seongjin Oh, Pervesh Kumar, Younggun Pu, Sang-Sun Yoo, Keum Cheol Hwang, Youngoo Yang, Yeonjae Jung, Hyungki Huh, Seokkee Kim, Joon-Mo Yoo, Kang-Yoon Lee

“…The proposed ILFM based ADPLL is fabricated in 55 nm CMOS technology and covers the operational frequency range of 2.402 GHz to 2.480 GHz with a reference frequency of 32 MHz. …”
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High-sensitivity, high-speed, broadband mid-infrared photodetector enabled by a van der Waals heterostructure with a vertical transport channel by Jianfeng Wu, Jialin Zhang, Ruiqi Jiang, Hao Wu, Shouheng Chen, Xinlei Zhang, Wenhui Wang, Yuanfang Yu, Qiang Fu, Rui Lin, Yueying Cui, Tao Zhou, Zhenliang Hu, Dongyang Wan, Xiaolong Chen, Weida Hu, Hongwei Liu, Junpeng Lu, Zhenhua Ni

“…Abstract The realization of room-temperature-operated, high-performance, miniaturized, low-power-consumption and Complementary Metal-Oxide-Semiconductor (CMOS)-compatible mid-infrared photodetectors is highly desirable for next-generation optoelectronic applications, but has thus far remained an outstanding challenge using conventional materials. …”
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System-Technology Co-Optimization for Dense Edge Architectures Using 3-D Integration and Nonvolatile Memory by Leandro M. Giacomini Rocha, Mohamed Naeim, Guilherme Paim, Moritz Brunion, Priya Venugopal, Dragomir Milojevic, James Myers, Mustafa Badaroglu, Marian Verhelst, Julien Ryckaert, Dwaipayan Biswas

“…The framework builds on a systolic array accelerator to provide the design-technology characterization points using advanced imec A10 nanosheet CMOS node along with emerging, high-density voltage-gated spin-orbit torque (VGSOT) magnetic memories (MRAM), combined with memory-on-logic fine-pitch 3-D wafer-to-wafer hybrid bonding. …”
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