Noise tolerant and power optimized ternary combinational circuits for arithmetic logic unit by Katyayani Chauhan, Deepika Bansal

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Realization of Arithmetic Logic Units Using Electro-Optic Microring Resonators in Photonic Circuits by Assylkhan Nurgali, Bikash Nakarmi, Carlo Molardi, Ikechi Augustine Ukaegbu

Subjects: “…Arithmetic logic units (ALUs)…”
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A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set by Dau-Chyrh Chang, Lihong Zhang, Xiaoling Yang, Shao-Hsiang Yen, Wenhua Yu

“…The benchmarks of the SSE acceleration on both the multi-CPU workstation and computer cluster have demonstrated the advantages of (vector arithmetic logic unit) VALU acceleration over GPU acceleration. …”
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Bidirectional RNN-based private car trajectory reconstruction algorithm by Zhu XIAO, Xin QIAN, Hongbo JIANG, Chenglin CAI, Fanzi ZENG

“…To address the problem that in the complex urban environment, due to the inevitable interruption of GNSS positioning signal and the accumulation of errors during vehicle driving, the collected vehicle trajectory data was likely to be inaccurate and incomplete.a bidirectional weighted trajectory reconstruction algorithm was proposed based on RNN neural network.The GNSS-OBD trajectory acquisition device was used to collect vehicle trajectory information, and multi-source data fusion was adopted to achieve bidirectional weighted trajectory reconstruction.Furthermore, the neural arithmetic logic unit (NALU) was leveraged with the purpose of enhancing the extrapolation ability of deep network and ensuring the accuracy of trajectory reconstruction.For the evaluation, real-world experiments were conducted to evaluate the performance of the proposed method in comparison with existing methods.The root mean square error (RMSE) indicator shows the algorithm accuracy and the reconstructed trajectory is visually displayed through Google Earth.Experimental results validate the effectiveness and reliability of the proposed algorithm.…”
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Design of generic vedic ALU using reversible logic by Kanchan S. Tiwari

“…This paper details the design and implementation of a low-power Generic Arithmetic Logic Unit (ALU) based on Vedic mathematics principles, constructed using reversible logic gates and implemented on an Artix-7 Field-Programmable Gate Array (FPGA).The Vedic mathematics principles are employed to derive efficient computational methods, and reversible logic is harnessed to achieve minimal power dissipation and reduced heat generation in the ALU. …”
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Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication by Geetam Singh Tomar, Marcus Llyode George, Abhineet Singh Tomar

“…Abstract Arithmetic logic units (ALUs) are core components of processing devices that perform required arithmetic and logical operations such as multiplication, division, addition, subtraction, and squaring. …”
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