Showing 1 - 3 results of 3 for search '"All-digital phase-locked loop (ADPLL)"', query time: 0.04s Refine Results
  1. 1
    A–102-dBm Sensitivity Multichannel Heterodyne Wake-Up Receiver With Integrated ADPLL

    A–102-dBm Sensitivity Multichannel Heterodyne Wake-Up Receiver With Integrated ADPLL by Linsheng Zhang, Divya Duvvuri, Suprio Bhattacharya, Anjana Dissanayake, Xinjian Liu, Henry L. Bishop, Yaobin Zhang, Travis N. Blalock, Benton H. Calhoun, Steven M. Bowers

    Published 2024-01-01
    Subjects: “…All-digital phase-locked loop (ADPLL)…”
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  2. 2
    Millimeter-Wave All-Digital Phase-Locked Loop Using Reference Waveform Oversampling Techniques

    Millimeter-Wave All-Digital Phase-Locked Loop Using Reference Waveform Oversampling Techniques by Teerachot Siriburanon, Chunxiao Liu, Jianglin Du, Robert Bogdan Staszewski

    Published 2024-01-01
    Subjects: “…All-digital phase-locked loop (ADPLL)…”
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  3. 3
    Nonlinearity-Induced Spur Analysis in Fractional-<italic>N</italic> Synthesizers With &#x0394;&#x03A3; Quantization Cancellation

    Nonlinearity-Induced Spur Analysis in Fractional-<italic>N</italic> Synthesizers With &#x0394;&#x03A3; Quantization Cancellation by Yizhe Hu, Weichen Tao, Robert Bogdan Staszewski

    Published 2024-01-01
    Subjects: “…All-digital phase-locked loop (ADPLL)…”
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