UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified Framework
Federated learning (FL) is now considered a critical method for breaking down data silos. However, data encryption can significantly increase computing time, limiting its large-scale deployment. While hardware acceleration can be an effective solution, existing research has largely focused on a sing...
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| Format: | Article |
| Language: | English |
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IEEE
2024-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10374366/ |
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| _version_ | 1850037009825923072 |
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| author | Biyao Che Zixiao Wang Ying Chen Liang Guo Yuan Liu Yuan Tian Jizhuang Zhao |
| author_facet | Biyao Che Zixiao Wang Ying Chen Liang Guo Yuan Liu Yuan Tian Jizhuang Zhao |
| author_sort | Biyao Che |
| collection | DOAJ |
| description | Federated learning (FL) is now considered a critical method for breaking down data silos. However, data encryption can significantly increase computing time, limiting its large-scale deployment. While hardware acceleration can be an effective solution, existing research has largely focused on a single hardware type, which hinders the acceleration of FL across the various heterogeneous hardware of the participants. In light of this challenge, this paper proposes a novel FL acceleration framework that supports diverse types of hardware. Firstly, we conduct an analysis of the key elements of FL to clarify our accelerator design goals. Secondly, a unified acceleration framework is proposed, which divides FL into four layers, providing a basis for the compatibility and implementation of heterogeneous hardware acceleration. After that, based on the physical properties of three mainstream acceleration hardware, i.e., GPU, ASIC and FPGA, the architecture design of corresponding heterogeneous accelerators under the framework is detailed. Finally, we validate the effectiveness of the proposed heterogeneous hardware acceleration framework through experiments. For specific algorithms, our implementation achieves a state of the art acceleration effect compared to previous work. For the end-to-end acceleration performance, we gain <inline-formula> <tex-math notation="LaTeX">$12\times $ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">$7.7\times $ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$2.2\times $ </tex-math></inline-formula> improvement on GPU, ASIC and FPGA respectively, compared to CPU in large-scale vertical linear regression training tasks. |
| format | Article |
| id | doaj-art-fad6814f1f3e45b8bc1db2a009d3c845 |
| institution | DOAJ |
| issn | 2169-3536 |
| language | English |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-fad6814f1f3e45b8bc1db2a009d3c8452025-08-20T02:56:59ZengIEEEIEEE Access2169-35362024-01-011258259810.1109/ACCESS.2023.334752110374366UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified FrameworkBiyao Che0Zixiao Wang1https://orcid.org/0000-0002-5351-0448Ying Chen2Liang Guo3https://orcid.org/0000-0001-7759-5784Yuan Liu4Yuan Tian5Jizhuang Zhao6China Telecom Research Institute, Beijing, ChinaChina Telecom Research Institute, Beijing, ChinaChina Telecom Research Institute, Beijing, ChinaInstitute of Cloud Computing and Big Data of CAICT, Beijing, ChinaChina Telecom Research Institute, Beijing, ChinaChina Telecom Research Institute, Beijing, ChinaChina Telecom Research Institute, Beijing, ChinaFederated learning (FL) is now considered a critical method for breaking down data silos. However, data encryption can significantly increase computing time, limiting its large-scale deployment. While hardware acceleration can be an effective solution, existing research has largely focused on a single hardware type, which hinders the acceleration of FL across the various heterogeneous hardware of the participants. In light of this challenge, this paper proposes a novel FL acceleration framework that supports diverse types of hardware. Firstly, we conduct an analysis of the key elements of FL to clarify our accelerator design goals. Secondly, a unified acceleration framework is proposed, which divides FL into four layers, providing a basis for the compatibility and implementation of heterogeneous hardware acceleration. After that, based on the physical properties of three mainstream acceleration hardware, i.e., GPU, ASIC and FPGA, the architecture design of corresponding heterogeneous accelerators under the framework is detailed. Finally, we validate the effectiveness of the proposed heterogeneous hardware acceleration framework through experiments. For specific algorithms, our implementation achieves a state of the art acceleration effect compared to previous work. For the end-to-end acceleration performance, we gain <inline-formula> <tex-math notation="LaTeX">$12\times $ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">$7.7\times $ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$2.2\times $ </tex-math></inline-formula> improvement on GPU, ASIC and FPGA respectively, compared to CPU in large-scale vertical linear regression training tasks.https://ieeexplore.ieee.org/document/10374366/Federated learninghardware accelerationhomomorphic encryptionprivacy preserving |
| spellingShingle | Biyao Che Zixiao Wang Ying Chen Liang Guo Yuan Liu Yuan Tian Jizhuang Zhao UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified Framework IEEE Access Federated learning hardware acceleration homomorphic encryption privacy preserving |
| title | UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified Framework |
| title_full | UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified Framework |
| title_fullStr | UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified Framework |
| title_full_unstemmed | UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified Framework |
| title_short | UniFL: Accelerating Federated Learning Using Heterogeneous Hardware Under a Unified Framework |
| title_sort | unifl accelerating federated learning using heterogeneous hardware under a unified framework |
| topic | Federated learning hardware acceleration homomorphic encryption privacy preserving |
| url | https://ieeexplore.ieee.org/document/10374366/ |
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