Design of generic vedic ALU using reversible logic
This paper details the design and implementation of a low-power Generic Arithmetic Logic Unit (ALU) based on Vedic mathematics principles, constructed using reversible logic gates and implemented on an Artix-7 Field-Programmable Gate Array (FPGA).The Vedic mathematics principles are employed to deri...
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2025-04-01
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| Series: | Memories - Materials, Devices, Circuits and Systems |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2773064625000015 |
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