Design of a Mathematical Unit in FPGA for the Implementation of the Control of a Magnetic Levitation System

This paper presents the design and implementation of an automatically generated mathematical unit, from a program developed in Java that describes the VHDL circuit, ready to be synthesized with the Xilinx ISE tool. The core contains diverse complex operations such as mathematical functions including...

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Bibliographic Details
Main Authors: Juan José Raygoza-Panduro, Susana Ortega-Cisneros, Jorge Rivera, Alberto de la Mora
Format: Article
Language:English
Published: Wiley 2008-01-01
Series:International Journal of Reconfigurable Computing
Online Access:http://dx.doi.org/10.1155/2008/634306
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