A New Efficient and Reliable Dynamically Reconfigurable Network-on-Chip
We present a new reliable Network-on-Chip (NoC) suitable for Dynamically Reconfigurable Multiprocessors on Chip systems. The proposed NoC is based on routers performing online error detection of routing algorithm and data packet errors. Our work focuses on adaptive routing algorithms which allow to...
Saved in:
Main Authors: | Cédric Killian, Camel Tanougast, Fabrice Monteiro, Abbas Dandache |
---|---|
Format: | Article |
Language: | English |
Published: |
Wiley
2012-01-01
|
Series: | Journal of Electrical and Computer Engineering |
Online Access: | http://dx.doi.org/10.1155/2012/843239 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Enabling Self-Organization in Embedded Systems with Reconfigurable Hardware
by: Christophe Bobda, et al.
Published: (2009-01-01) -
Self-Calibrated Energy-Efficient and Reliable Channels for On-Chip Interconnection Networks
by: Po-Tsang Huang, et al.
Published: (2012-01-01) -
Dynamic Task Distribution Model for On-Chip Reconfigurable High Speed Computing System
by: Mahendra Vucha, et al.
Published: (2015-01-01) -
A Taxonomy of Reconfigurable Single-/Multiprocessor Systems-on-Chip
by: Diana Göhringer, et al.
Published: (2009-01-01) -
A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks
by: Jim Harkin, et al.
Published: (2009-01-01)