Canonization of graphs during transistor circuits decompilation
Objectives. The objective of the work is to develop the means for recognition (extraction) of high-level structures in circuits on transistor level. This allows to obtain a representation on logical level, equivalent to original flat description on transistor level. Obtaining such a representation s...
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Main Authors: | D. I. Cheremisinov, L. D. Cheremisinova |
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Format: | Article |
Language: | Russian |
Published: |
National Academy of Sciences of Belarus, the United Institute of Informatics Problems
2022-09-01
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Series: | Informatika |
Subjects: | |
Online Access: | https://inf.grid.by/jour/article/view/1205 |
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