Designing of 2-Stage CPU Scheduler Using Vague Logic
In operating system the CPU scheduler is designed in such a way that all the resources are fully utilized. With static priority scheduling the scheduler ensures that CPU time will be assigned according to the highest priority but ignores other factors; hence it affects the performance. To improve th...
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Wiley
2014-01-01
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Series: | Advances in Fuzzy Systems |
Online Access: | http://dx.doi.org/10.1155/2014/841976 |
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author | Supriya Raheja Reena Dhadich Smita Rajpal |
author_facet | Supriya Raheja Reena Dhadich Smita Rajpal |
author_sort | Supriya Raheja |
collection | DOAJ |
description | In operating system the CPU scheduler is designed in such a way that all the resources are fully utilized. With static priority scheduling the scheduler ensures that CPU time will be assigned according to the highest priority but ignores other factors; hence it affects the performance. To improve the performance, we propose a new 2-stage vague logic based scheduler. In first stage, scheduler handles the uncertainty of tasks using the proposed vague inference system (VIS). In second stage, scheduler uses a vague oriented priority scheduling (VOPS) algorithm for selection of next process. The goal of this work is to handle the uncertainty as well as to optimize both the average and the amount of variation with respect to performance matrices average waiting time, average turnaround time, and average normalized turnaround time. A simulation using MATLAB is also conducted to evaluate the performance. Simulation results show that the proposed scheduler using VOPS algorithm is better than the scheduler with traditional priority scheduling algorithm. Results are based on the dual concept of fuzzy theory and its generalization, vague theory. Additionally, this work comprises the evaluation of VOPS and shortest job first algorithm. The outcome of proposed VOPS algorithm is much closer to the result obtained by traditional shortest job first. |
format | Article |
id | doaj-art-f15d8561cdea408cbf2a6027f013ff4c |
institution | Kabale University |
issn | 1687-7101 1687-711X |
language | English |
publishDate | 2014-01-01 |
publisher | Wiley |
record_format | Article |
series | Advances in Fuzzy Systems |
spelling | doaj-art-f15d8561cdea408cbf2a6027f013ff4c2025-02-03T01:09:53ZengWileyAdvances in Fuzzy Systems1687-71011687-711X2014-01-01201410.1155/2014/841976841976Designing of 2-Stage CPU Scheduler Using Vague LogicSupriya Raheja0Reena Dhadich1Smita Rajpal2Department of Computer Science & Engineering, ITM University, Gurgaon, IndiaDepartment of Computer Science, University of Kota, Rajasthan, IndiaAlpha Global IT, Toronto, ON, CanadaIn operating system the CPU scheduler is designed in such a way that all the resources are fully utilized. With static priority scheduling the scheduler ensures that CPU time will be assigned according to the highest priority but ignores other factors; hence it affects the performance. To improve the performance, we propose a new 2-stage vague logic based scheduler. In first stage, scheduler handles the uncertainty of tasks using the proposed vague inference system (VIS). In second stage, scheduler uses a vague oriented priority scheduling (VOPS) algorithm for selection of next process. The goal of this work is to handle the uncertainty as well as to optimize both the average and the amount of variation with respect to performance matrices average waiting time, average turnaround time, and average normalized turnaround time. A simulation using MATLAB is also conducted to evaluate the performance. Simulation results show that the proposed scheduler using VOPS algorithm is better than the scheduler with traditional priority scheduling algorithm. Results are based on the dual concept of fuzzy theory and its generalization, vague theory. Additionally, this work comprises the evaluation of VOPS and shortest job first algorithm. The outcome of proposed VOPS algorithm is much closer to the result obtained by traditional shortest job first.http://dx.doi.org/10.1155/2014/841976 |
spellingShingle | Supriya Raheja Reena Dhadich Smita Rajpal Designing of 2-Stage CPU Scheduler Using Vague Logic Advances in Fuzzy Systems |
title | Designing of 2-Stage CPU Scheduler Using Vague Logic |
title_full | Designing of 2-Stage CPU Scheduler Using Vague Logic |
title_fullStr | Designing of 2-Stage CPU Scheduler Using Vague Logic |
title_full_unstemmed | Designing of 2-Stage CPU Scheduler Using Vague Logic |
title_short | Designing of 2-Stage CPU Scheduler Using Vague Logic |
title_sort | designing of 2 stage cpu scheduler using vague logic |
url | http://dx.doi.org/10.1155/2014/841976 |
work_keys_str_mv | AT supriyaraheja designingof2stagecpuschedulerusingvaguelogic AT reenadhadich designingof2stagecpuschedulerusingvaguelogic AT smitarajpal designingof2stagecpuschedulerusingvaguelogic |