A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model

A fall-detection system was implemented utilizing a 2.45 GHz continuous wave radar along with power-efficient and fully-analog integrated classifier architectures. The Power Burst Curve and the effective acceleration were derived from the short time Fourier transform, and then processed by the analo...

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Main Authors: Vassilis Alimisis, Dimitrios G. Arnaoutoglou, Emmanouil Anastasios Serlis, Argyro Kamperi, Konstantinos Metaxas, George A. Kyriacou, Paul P. Sotiriadis
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Open Journal of Circuits and Systems
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Online Access:https://ieeexplore.ieee.org/document/10542293/
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author Vassilis Alimisis
Dimitrios G. Arnaoutoglou
Emmanouil Anastasios Serlis
Argyro Kamperi
Konstantinos Metaxas
George A. Kyriacou
Paul P. Sotiriadis
author_facet Vassilis Alimisis
Dimitrios G. Arnaoutoglou
Emmanouil Anastasios Serlis
Argyro Kamperi
Konstantinos Metaxas
George A. Kyriacou
Paul P. Sotiriadis
author_sort Vassilis Alimisis
collection DOAJ
description A fall-detection system was implemented utilizing a 2.45 GHz continuous wave radar along with power-efficient and fully-analog integrated classifier architectures. The Power Burst Curve and the effective acceleration were derived from the short time Fourier transform, and then processed by the analog classifier. The proposed classifier architectures are based on different approximations of the Decision tree classification model. The architectures consist of three main building blocks: sigmoid function circuit, analog multiplier and an argmax operator circuit. To assess the hardware design, a thorough analysis is performed, comparing it to commonly used analog classifiers while exploiting the extracted data. The architectures were trained using Python and were compared to software-based classifiers. The circuit designs were executed using TSMC’s 90 nm CMOS process technology and the Cadence IC Suite was employed for tasks including design, schematic implementation, and post-layout simulations.
format Article
id doaj-art-f0fcf29ab16f4a3b98e9e395031bfb76
institution Kabale University
issn 2644-1225
language English
publishDate 2024-01-01
publisher IEEE
record_format Article
series IEEE Open Journal of Circuits and Systems
spelling doaj-art-f0fcf29ab16f4a3b98e9e395031bfb762025-01-21T00:02:55ZengIEEEIEEE Open Journal of Circuits and Systems2644-12252024-01-01522424210.1109/OJCAS.2024.340766310542293A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree ModelVassilis Alimisis0https://orcid.org/0000-0002-2090-1493Dimitrios G. Arnaoutoglou1https://orcid.org/0009-0004-1668-132XEmmanouil Anastasios Serlis2https://orcid.org/0009-0007-2553-5203Argyro Kamperi3Konstantinos Metaxas4George A. Kyriacou5https://orcid.org/0000-0001-5253-0896Paul P. Sotiriadis6https://orcid.org/0000-0001-6030-4645Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, GreeceDepartment of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, GreeceDepartment of Electrical and Computer Engineering, National Technical University of Athens, Athens, GreeceDepartment of Electrical and Computer Engineering, National Technical University of Athens, Athens, GreeceDepartment of Electrical and Computer Engineering, National Technical University of Athens, Athens, GreeceDepartment of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, GreeceDepartment of Electrical and Computer Engineering, National Technical University of Athens, Athens, GreeceA fall-detection system was implemented utilizing a 2.45 GHz continuous wave radar along with power-efficient and fully-analog integrated classifier architectures. The Power Burst Curve and the effective acceleration were derived from the short time Fourier transform, and then processed by the analog classifier. The proposed classifier architectures are based on different approximations of the Decision tree classification model. The architectures consist of three main building blocks: sigmoid function circuit, analog multiplier and an argmax operator circuit. To assess the hardware design, a thorough analysis is performed, comparing it to commonly used analog classifiers while exploiting the extracted data. The architectures were trained using Python and were compared to software-based classifiers. The circuit designs were executed using TSMC’s 90 nm CMOS process technology and the Cadence IC Suite was employed for tasks including design, schematic implementation, and post-layout simulations.https://ieeexplore.ieee.org/document/10542293/Analog hardware classifierdecision treefall-detectionradar-based systemsigmoid-based implementationsub-threshold region
spellingShingle Vassilis Alimisis
Dimitrios G. Arnaoutoglou
Emmanouil Anastasios Serlis
Argyro Kamperi
Konstantinos Metaxas
George A. Kyriacou
Paul P. Sotiriadis
A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model
IEEE Open Journal of Circuits and Systems
Analog hardware classifier
decision tree
fall-detection
radar-based system
sigmoid-based implementation
sub-threshold region
title A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model
title_full A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model
title_fullStr A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model
title_full_unstemmed A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model
title_short A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model
title_sort radar based system for detection of human fall utilizing analog hardware architectures of decision tree model
topic Analog hardware classifier
decision tree
fall-detection
radar-based system
sigmoid-based implementation
sub-threshold region
url https://ieeexplore.ieee.org/document/10542293/
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