Modeling and Implementation of a Power Estimation Methodology for SystemC

This work describes a methodology to model power consumption of logic modules. A detailed mathematical model is presented and incorporated in a tool for translation of models written in VHDL to SystemC. The functionality for implicit power monitoring and estimation is inserted at module translation....

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Main Authors: Matthias Kuehnle, Andre Wagner, Alisson V. Brito, Juergen Becker
Format: Article
Language:English
Published: Wiley 2012-01-01
Series:International Journal of Reconfigurable Computing
Online Access:http://dx.doi.org/10.1155/2012/439727
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author Matthias Kuehnle
Andre Wagner
Alisson V. Brito
Juergen Becker
author_facet Matthias Kuehnle
Andre Wagner
Alisson V. Brito
Juergen Becker
author_sort Matthias Kuehnle
collection DOAJ
description This work describes a methodology to model power consumption of logic modules. A detailed mathematical model is presented and incorporated in a tool for translation of models written in VHDL to SystemC. The functionality for implicit power monitoring and estimation is inserted at module translation. The translation further implements an approach to wrap RTL to TLM interfaces so that the translated module can be connected to a system-level simulator. The power analysis is based on a statistical model of the underlying HW structure and an analysis of input data. The flexibility of the C++ syntax is exploited, to integrate the power evaluation technique. The accuracy and speed-up of the approach are illustrated and compared to a conventional power analysis flow using PPR simulation, based on Xilinx technology.
format Article
id doaj-art-ee88775d176c48dea644671340a6a5e1
institution Kabale University
issn 1687-7195
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language English
publishDate 2012-01-01
publisher Wiley
record_format Article
series International Journal of Reconfigurable Computing
spelling doaj-art-ee88775d176c48dea644671340a6a5e12025-02-03T05:54:12ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092012-01-01201210.1155/2012/439727439727Modeling and Implementation of a Power Estimation Methodology for SystemCMatthias Kuehnle0Andre Wagner1Alisson V. Brito2Juergen Becker3Institute for Information Processing Technology, KIT, 7602 Karlsruhe, GermanyInstitute for Information Processing Technology, KIT, 7602 Karlsruhe, GermanyDepartment of Informatics, Federal University of Paraiba (UFPB), 58051-900 João Pessoa, PB, BrazilInstitute for Information Processing Technology, KIT, 7602 Karlsruhe, GermanyThis work describes a methodology to model power consumption of logic modules. A detailed mathematical model is presented and incorporated in a tool for translation of models written in VHDL to SystemC. The functionality for implicit power monitoring and estimation is inserted at module translation. The translation further implements an approach to wrap RTL to TLM interfaces so that the translated module can be connected to a system-level simulator. The power analysis is based on a statistical model of the underlying HW structure and an analysis of input data. The flexibility of the C++ syntax is exploited, to integrate the power evaluation technique. The accuracy and speed-up of the approach are illustrated and compared to a conventional power analysis flow using PPR simulation, based on Xilinx technology.http://dx.doi.org/10.1155/2012/439727
spellingShingle Matthias Kuehnle
Andre Wagner
Alisson V. Brito
Juergen Becker
Modeling and Implementation of a Power Estimation Methodology for SystemC
International Journal of Reconfigurable Computing
title Modeling and Implementation of a Power Estimation Methodology for SystemC
title_full Modeling and Implementation of a Power Estimation Methodology for SystemC
title_fullStr Modeling and Implementation of a Power Estimation Methodology for SystemC
title_full_unstemmed Modeling and Implementation of a Power Estimation Methodology for SystemC
title_short Modeling and Implementation of a Power Estimation Methodology for SystemC
title_sort modeling and implementation of a power estimation methodology for systemc
url http://dx.doi.org/10.1155/2012/439727
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AT andrewagner modelingandimplementationofapowerestimationmethodologyforsystemc
AT alissonvbrito modelingandimplementationofapowerestimationmethodologyforsystemc
AT juergenbecker modelingandimplementationofapowerestimationmethodologyforsystemc