Processor-in-the-Loop validation of direct power control based on fractional-order modified super-twisting algorithm for doubly-fed induction generators - Mourad Yessef; Habib Benbouhenni; Ahmed Lagrioui; Nicu Bizon; Badre Bossoufi; Saad F. Al-Gahtani; Z. M. S. Elbarbary (Scientific Reports)
Abstract The Super-Twisting Control (STC) is a prominent nonlinear control method that operates independently of the mathematical model of the wind energy conversion system. This method is often considered a viable option because of its exceptional performance and reliability. Nonetheless, it presents specific constraints, including the requirement for numerous gain parameters and susceptibility to system failures. A more refined solution, termed “Fractional-Order Modified STC” (FOMSTC), is proposed to address these issues. This technique is notable for its straightforwardness, minimal gain parameters, ease of implementation, compatibility with embedded systems, and economic efficiency. The MSTC methodology was implemented in the Direct Power Control (DPC) of a Doubly Fed Induction Generator (DFIG), with the controller calculating the reference voltage values for the inverter of the machine. Alongside FOMSTC, Pulse Width Modulation (PWM) was employed to regulate the operation of the inverter. The proposed FOMSTC strategy exhibits simplicity, minimal gain requirements, straightforward implementation in embedded systems, and rapid dynamic response, positioning it as an effective control method. This methodology was utilized in the research to enhance energy quality and reduce the Total Harmonic Distortion (THD) of the system’s output currents, all while limiting DFIG power overshoot. The innovative strategy underwent validation via simulation and was subsequently confirmed through Processor-in-the-Loop (PIL) testing to assess its performance in real-time embedded systems. The results were analyzed in relation to traditional control strategies and contemporary research findings. The DPC-FOMSTC strategy showed notable decreases in ripples, overshoot, and steady-state error (SSE) for active power (Ps) by around 78.85%, 69.05%, and 36.84%, respectively, when compared to the conventional DPC method. In a comparable analysis, reductions of 70.90%, 52.63%, and 63.46% were observed in SSE, overshoot, and reactive power (Qs) ripple, respectively, when contrasted with the conventional DPC method.