Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction
Driven by the importance of energy consumption in system-on-chip design as an evaluation factor, this paper presents a design methodology at the system level to optimize power consumption on ARM-based architecture for real-time video processing. The proposed design flow is based on the interaction b...
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Format: | Article |
Language: | English |
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Wiley
2018-01-01
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Series: | International Journal of Reconfigurable Computing |
Online Access: | http://dx.doi.org/10.1155/2018/2843582 |
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author | Lilia Kechiche Lamjed Touil Bouraoui Ouni |
author_facet | Lilia Kechiche Lamjed Touil Bouraoui Ouni |
author_sort | Lilia Kechiche |
collection | DOAJ |
description | Driven by the importance of energy consumption in system-on-chip design as an evaluation factor, this paper presents a design methodology at the system level to optimize power consumption on ARM-based architecture for real-time video processing. The proposed design flow is based on the interaction between the tool and user optimizations. The tool optimizations are the options and best practices available on the integrated design environment for the Xilinx technology and the target Zynq-7000 architecture. The user methods present methods proposed by the user to optimize power consumption. We used the principles of voltage scaling and frequency scaling techniques for user methods. These two techniques allow energy to be consumed in the proportion of work to be done. The suggested flow is applied on real-time video processing system. The results show power savings for up to 60% with respect to performance and real-time constraints. |
format | Article |
id | doaj-art-e566836802b9457f853e30dc51508bbb |
institution | Kabale University |
issn | 1687-7195 1687-7209 |
language | English |
publishDate | 2018-01-01 |
publisher | Wiley |
record_format | Article |
series | International Journal of Reconfigurable Computing |
spelling | doaj-art-e566836802b9457f853e30dc51508bbb2025-02-03T06:13:39ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092018-01-01201810.1155/2018/28435822843582Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power ReductionLilia Kechiche0Lamjed Touil1Bouraoui Ouni2Laboratory of Electronics and Microelectronics, University of Monastir, Monastir, TunisiaNetworked Objects Control and Communication Systems Lab, Sousse, TunisiaNetworked Objects Control and Communication Systems Lab, Sousse, TunisiaDriven by the importance of energy consumption in system-on-chip design as an evaluation factor, this paper presents a design methodology at the system level to optimize power consumption on ARM-based architecture for real-time video processing. The proposed design flow is based on the interaction between the tool and user optimizations. The tool optimizations are the options and best practices available on the integrated design environment for the Xilinx technology and the target Zynq-7000 architecture. The user methods present methods proposed by the user to optimize power consumption. We used the principles of voltage scaling and frequency scaling techniques for user methods. These two techniques allow energy to be consumed in the proportion of work to be done. The suggested flow is applied on real-time video processing system. The results show power savings for up to 60% with respect to performance and real-time constraints.http://dx.doi.org/10.1155/2018/2843582 |
spellingShingle | Lilia Kechiche Lamjed Touil Bouraoui Ouni Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction International Journal of Reconfigurable Computing |
title | Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction |
title_full | Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction |
title_fullStr | Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction |
title_full_unstemmed | Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction |
title_short | Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction |
title_sort | toward the implementation of an asic like system on fpga for real time video processing with power reduction |
url | http://dx.doi.org/10.1155/2018/2843582 |
work_keys_str_mv | AT liliakechiche towardtheimplementationofanasiclikesystemonfpgaforrealtimevideoprocessingwithpowerreduction AT lamjedtouil towardtheimplementationofanasiclikesystemonfpgaforrealtimevideoprocessingwithpowerreduction AT bouraouiouni towardtheimplementationofanasiclikesystemonfpgaforrealtimevideoprocessingwithpowerreduction |