Study on Single Event Upset and Mitigation Technique in JLTFET-Based 6T SRAM Cell
The effect of single event transient (SET) on 6T SRAM cell employing a 20 nm silicon-based junctionless tunneling field effect transistor (JLTFET) is explored for the first time. JLTFET-based SRAM circuit is designed using the look up table-based Verilog A code obtained from TCAD values of the devic...
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Main Authors: | , |
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Format: | Article |
Language: | English |
Published: |
Wiley
2024-01-01
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Series: | Journal of Electrical and Computer Engineering |
Online Access: | http://dx.doi.org/10.1155/2024/9212078 |
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