Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System
In this parper, a 4D absolute memristor Jerk chaotic system is proposed. Firstly, complex dynamics are studied by phase diagram, Poincaré section, power spectrum, bifurcation diagram, 0-1 test, and Lyapunov exponent spectrum. Then, the period doubling bifurcation, degradation, and offset boosting ar...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2023-01-01
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| Series: | Complexity |
| Online Access: | http://dx.doi.org/10.1155/2023/5912191 |
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| _version_ | 1832559727110782976 |
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| author | Jindong Liu Zhen Wang Huaigu Tian Fei Xie |
| author_facet | Jindong Liu Zhen Wang Huaigu Tian Fei Xie |
| author_sort | Jindong Liu |
| collection | DOAJ |
| description | In this parper, a 4D absolute memristor Jerk chaotic system is proposed. Firstly, complex dynamics are studied by phase diagram, Poincaré section, power spectrum, bifurcation diagram, 0-1 test, and Lyapunov exponent spectrum. Then, the period doubling bifurcation, degradation, and offset boosting are revealed. For the feasibility of practical application, the analog circuit and FPGA digital circuit are designed. Finally, a simplified predefined time synchronization scheme is proposed; comparing with the full control input synchronization scheme, the simplified predefined time synchronization scheme can not only reduce the controller inputs but also predefine the synchronization time. |
| format | Article |
| id | doaj-art-dee04bd226404e01ba5366c231c87bfa |
| institution | Kabale University |
| issn | 1099-0526 |
| language | English |
| publishDate | 2023-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | Complexity |
| spelling | doaj-art-dee04bd226404e01ba5366c231c87bfa2025-02-03T01:29:27ZengWileyComplexity1099-05262023-01-01202310.1155/2023/5912191Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic SystemJindong Liu0Zhen Wang1Huaigu Tian2Fei Xie3Xi’an Key Laboratory of Human-Machine Integration and Control Technology for Intelligent RehabilitationXi’an Key Laboratory of Human-Machine Integration and Control Technology for Intelligent RehabilitationXi’an Key Laboratory of Human-Machine Integration and Control Technology for Intelligent RehabilitationXi’an Key Laboratory of Human-Machine Integration and Control Technology for Intelligent RehabilitationIn this parper, a 4D absolute memristor Jerk chaotic system is proposed. Firstly, complex dynamics are studied by phase diagram, Poincaré section, power spectrum, bifurcation diagram, 0-1 test, and Lyapunov exponent spectrum. Then, the period doubling bifurcation, degradation, and offset boosting are revealed. For the feasibility of practical application, the analog circuit and FPGA digital circuit are designed. Finally, a simplified predefined time synchronization scheme is proposed; comparing with the full control input synchronization scheme, the simplified predefined time synchronization scheme can not only reduce the controller inputs but also predefine the synchronization time.http://dx.doi.org/10.1155/2023/5912191 |
| spellingShingle | Jindong Liu Zhen Wang Huaigu Tian Fei Xie Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System Complexity |
| title | Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System |
| title_full | Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System |
| title_fullStr | Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System |
| title_full_unstemmed | Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System |
| title_short | Complex Dynamic Analysis, Circuit Design and Simplified Predefined Time Synchronization for a Jerk Absolute Memristor Chaotic System |
| title_sort | complex dynamic analysis circuit design and simplified predefined time synchronization for a jerk absolute memristor chaotic system |
| url | http://dx.doi.org/10.1155/2023/5912191 |
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