Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor
This paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance amplif...
Saved in:
Main Authors: | , , , |
---|---|
Format: | Article |
Language: | English |
Published: |
Wiley
2014-01-01
|
Series: | The Scientific World Journal |
Online Access: | http://dx.doi.org/10.1155/2014/208540 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
_version_ | 1832549687831298048 |
---|---|
author | Fang Tang Amine Bermak Amira Abbes Mohieddine Amor Benammar |
author_facet | Fang Tang Amine Bermak Amira Abbes Mohieddine Amor Benammar |
author_sort | Fang Tang |
collection | DOAJ |
description | This paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance
amplifier (OTA), for the concern of a high power noise rejection. The second integrator is realized with a single-ended inverter-based amplifier, instead of a standard OTA. As a result, the power consumption is reduced, without sacrificing the noise performance. Moreover, the variable gain amplifier in the traditional column-parallel read-out circuit is merged into the front-end of the CTSD modulator. By programming the input resistance, the amplitude range of the input current can be tuned with 8 scales, which is equivalent to a traditional 2-bit preamplification function without consuming extra power and chip area. The test chip prototype is fabricated using 0.18 μm CMOS process and the measurement result shows an ADC power consumption lower than 63.5 μW under 1.4 V power supply and 50 MHz clock frequency. |
format | Article |
id | doaj-art-dc986c30deef48e4bda2062ee780044e |
institution | Kabale University |
issn | 2356-6140 1537-744X |
language | English |
publishDate | 2014-01-01 |
publisher | Wiley |
record_format | Article |
series | The Scientific World Journal |
spelling | doaj-art-dc986c30deef48e4bda2062ee780044e2025-02-03T06:10:48ZengWileyThe Scientific World Journal2356-61401537-744X2014-01-01201410.1155/2014/208540208540Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image SensorFang Tang0Amine Bermak1Amira Abbes2Mohieddine Amor Benammar3College of Communication Engineering, Chongqing University (CQU), Shapingba, Chongging 400044, ChinaHong Kong University of Science and Technology (HKUST), ECE Department, Clear Water Bay, Kowloon, Hong KongSchool of Computing, University of West Scotland, Paisley, Renfrewshire, UKQatar University, 2713 Doha, QatarThis paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance amplifier (OTA), for the concern of a high power noise rejection. The second integrator is realized with a single-ended inverter-based amplifier, instead of a standard OTA. As a result, the power consumption is reduced, without sacrificing the noise performance. Moreover, the variable gain amplifier in the traditional column-parallel read-out circuit is merged into the front-end of the CTSD modulator. By programming the input resistance, the amplitude range of the input current can be tuned with 8 scales, which is equivalent to a traditional 2-bit preamplification function without consuming extra power and chip area. The test chip prototype is fabricated using 0.18 μm CMOS process and the measurement result shows an ADC power consumption lower than 63.5 μW under 1.4 V power supply and 50 MHz clock frequency.http://dx.doi.org/10.1155/2014/208540 |
spellingShingle | Fang Tang Amine Bermak Amira Abbes Mohieddine Amor Benammar Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor The Scientific World Journal |
title | Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor |
title_full | Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor |
title_fullStr | Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor |
title_full_unstemmed | Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor |
title_short | Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor |
title_sort | continuous time σδ adc with implicit variable gain amplifier for cmos image sensor |
url | http://dx.doi.org/10.1155/2014/208540 |
work_keys_str_mv | AT fangtang continuoustimesdadcwithimplicitvariablegainamplifierforcmosimagesensor AT aminebermak continuoustimesdadcwithimplicitvariablegainamplifierforcmosimagesensor AT amiraabbes continuoustimesdadcwithimplicitvariablegainamplifierforcmosimagesensor AT mohieddineamorbenammar continuoustimesdadcwithimplicitvariablegainamplifierforcmosimagesensor |