APA (7th ed.) Citation

Chowdhury, S. N., Chen, M., & Shah, S. Analysis and Verilog-A Modeling of Floating-Gate Transistors. IEEE.

Chicago Style (17th ed.) Citation

Chowdhury, Sayma Nowshin, Matthew Chen, and Sahil Shah. Analysis and Verilog-A Modeling of Floating-Gate Transistors. IEEE.

MLA (9th ed.) Citation

Chowdhury, Sayma Nowshin, et al. Analysis and Verilog-A Modeling of Floating-Gate Transistors. IEEE.

Warning: These citations may not always be 100% accurate.