A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array Applications
A 6-bit digital-controlled attenuator with low phase imbalance for a K-band phased array system is presented in this paper. To decrease the insertion phase difference, the proposed design adopts a phase correction capacitor in the shunt branch of the conventional switched T/Pi structure. The capacit...
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IEEE
2017-01-01
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| Online Access: | https://ieeexplore.ieee.org/document/8031955/ |
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| author | Lin Zhang Chenxi Zhao Xiaoning Zhang Yunqiu Wu Kai Kang |
| author_facet | Lin Zhang Chenxi Zhao Xiaoning Zhang Yunqiu Wu Kai Kang |
| author_sort | Lin Zhang |
| collection | DOAJ |
| description | A 6-bit digital-controlled attenuator with low phase imbalance for a K-band phased array system is presented in this paper. To decrease the insertion phase difference, the proposed design adopts a phase correction capacitor in the shunt branch of the conventional switched T/Pi structure. The capacitor and the parallel resistor compose a phase compensation network to correct the insertion phase error. The attenuator is designed and fabricated in <inline-formula> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> CMOS process. From 19 to 21 GHz, the insertion loss is 7.2–8 dB. The rms phase imbalance is less than 3.8° over 19–21 GHz. The attenuator has a maximum attenuation range of 32 dB with 0.5-dB step (64 states). The core cell chip size is 1.32 mm <inline-formula> <tex-math notation="LaTeX">$\times0.34$ </tex-math></inline-formula> mm excluding pads. |
| format | Article |
| id | doaj-art-d6fa7e985e2e4d758da20bfbd9e31fbe |
| institution | OA Journals |
| issn | 2169-3536 |
| language | English |
| publishDate | 2017-01-01 |
| publisher | IEEE |
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| series | IEEE Access |
| spelling | doaj-art-d6fa7e985e2e4d758da20bfbd9e31fbe2025-08-20T02:09:38ZengIEEEIEEE Access2169-35362017-01-015196571966110.1109/ACCESS.2017.27502038031955A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array ApplicationsLin Zhang0Chenxi Zhao1https://orcid.org/0000-0001-7166-2755Xiaoning Zhang2Yunqiu Wu3Kai Kang4https://orcid.org/0000-0003-0616-2994School of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaSchool of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaSchool of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaSchool of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaSchool of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaA 6-bit digital-controlled attenuator with low phase imbalance for a K-band phased array system is presented in this paper. To decrease the insertion phase difference, the proposed design adopts a phase correction capacitor in the shunt branch of the conventional switched T/Pi structure. The capacitor and the parallel resistor compose a phase compensation network to correct the insertion phase error. The attenuator is designed and fabricated in <inline-formula> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> CMOS process. From 19 to 21 GHz, the insertion loss is 7.2–8 dB. The rms phase imbalance is less than 3.8° over 19–21 GHz. The attenuator has a maximum attenuation range of 32 dB with 0.5-dB step (64 states). The core cell chip size is 1.32 mm <inline-formula> <tex-math notation="LaTeX">$\times0.34$ </tex-math></inline-formula> mm excluding pads.https://ieeexplore.ieee.org/document/8031955/AttenuatorCMOSphase imbalance |
| spellingShingle | Lin Zhang Chenxi Zhao Xiaoning Zhang Yunqiu Wu Kai Kang A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array Applications IEEE Access Attenuator CMOS phase imbalance |
| title | A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array Applications |
| title_full | A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array Applications |
| title_fullStr | A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array Applications |
| title_full_unstemmed | A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array Applications |
| title_short | A CMOS K-Band 6-bit Attenuator With Low Phase Imbalance for Phased Array Applications |
| title_sort | cmos k band 6 bit attenuator with low phase imbalance for phased array applications |
| topic | Attenuator CMOS phase imbalance |
| url | https://ieeexplore.ieee.org/document/8031955/ |
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