Optimization of data allocation in hierarchical memory for blocked shortest paths algorithms
This paper is devoted to the reduction of data transfer between the main memory and direct mapped cache for blocked shortest paths algorithms (BSPA), which represent data by a D[M×M] matrix of blocks. For large graphs, the cache size S = δ×M2, δ < 1 is smaller than the matrix size. The cache...
Saved in:
Main Author: | A. A. Prihozhy |
---|---|
Format: | Article |
Language: | English |
Published: |
Belarusian National Technical University
2021-10-01
|
Series: | Системный анализ и прикладная информатика |
Subjects: | |
Online Access: | https://sapi.bntu.by/jour/article/view/522 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Tuning block-parallel all-pairs shortest path algorithm for efficient multi-core implementation
by: O. N. Karasik, et al.
Published: (2022-12-01) -
Speed-up Technique in Time-Varying Shortest Path Problems with Arbitrary Waiting Times
by: Gholamhasan Shirdel, et al.
Published: (2020-09-01) -
Influence of shortest path algorithms on energy consumption of multi-core processors
by: A. A. Prihozhy, et al.
Published: (2023-10-01) -
A Hierarchical Cache Architecture-Oriented Cache Management Scheme for Information-Centric Networking
by: Yichao Chao, et al.
Published: (2025-01-01) -
New blocked all-pairs shortest paths algorithms operating on blocks of unequal sizes
by: A. A. Prihozhy, et al.
Published: (2024-01-01)