A Dual-Mode Compatible CT ADC With FIR DAC and SB Quantization for DSM and IDSM Operations
This paper presents a continuous-time (CT) ADC capable of operating as either a delta-sigma modulator (DSM) or an incremental DSM (IDSM). To address the high jitter sensitivity inherent to oversampled CT systems, an architecture incorporating FIR DACs and a single-bit (SB) quantizer is adopted. A fu...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/11062919/ |
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