New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA
Currently, reconfigurable hardware devices feature a high density of heterogeneous resources to enable multitasking and offer flexibility in application needs. These concepts raise the need for efficient management of hardware tasks and hardware resources. The scheduling of hardware tasks is highly...
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| Format: | Article |
| Language: | English |
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Wiley
2010-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2010/980762 |
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| _version_ | 1832559034093273088 |
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| author | Ikbel Belaid Fabrice Muller Maher Benjemaa |
| author_facet | Ikbel Belaid Fabrice Muller Maher Benjemaa |
| author_sort | Ikbel Belaid |
| collection | DOAJ |
| description | Currently, reconfigurable hardware devices feature a high density of heterogeneous resources to enable multitasking and offer flexibility in application needs. These concepts raise the need for efficient management of hardware tasks and hardware resources. The scheduling of hardware tasks is highly dependent on placement. Placement focuses on allocation of hardware resources required by the scheduled hardware tasks. In this paper, we propose novel three-level resource management that investigates enhancement of placement quality by reducing task rejection, configuration overheads, and by optimizing resource utilization. Improving placement quality will produce significant enhancement of performance for scheduling and overall execution time of the application in FPGA. Hence, the placement problem is formulated into a constrained optimization problem and resolved with powerful solvers using the Branch and Bound method. The obtained results of an application of heterogeneous hardware tasks show an average resource utilization of 36% of the available resources on the reconfigurable region and an overall overhead of 11% of total application running time, and we have eliminated the issue of task rejection. Compared to static implementation, the gain in resource utilization within the reconfigurable region achieves up to 43%. |
| format | Article |
| id | doaj-art-d192405683a948f6badcd41aa7775226 |
| institution | Kabale University |
| issn | 1687-7195 1687-7209 |
| language | English |
| publishDate | 2010-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Reconfigurable Computing |
| spelling | doaj-art-d192405683a948f6badcd41aa77752262025-02-03T01:31:02ZengWileyInternational Journal of Reconfigurable Computing1687-71951687-72092010-01-01201010.1155/2010/980762980762New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGAIkbel Belaid0Fabrice Muller1Maher Benjemaa2University of Nice Sophia-Antipolis/LEAT-CNRS, 250 rue Albert Einstein, bât 4. 06560, Sophia Antipolis - Cedex, FranceUniversity of Nice Sophia-Antipolis/LEAT-CNRS, 250 rue Albert Einstein, bât 4. 06560, Sophia Antipolis - Cedex, FranceUniversity of Nice Sophia-Antipolis/LEAT-CNRS, 250 rue Albert Einstein, bât 4. 06560, Sophia Antipolis - Cedex, FranceCurrently, reconfigurable hardware devices feature a high density of heterogeneous resources to enable multitasking and offer flexibility in application needs. These concepts raise the need for efficient management of hardware tasks and hardware resources. The scheduling of hardware tasks is highly dependent on placement. Placement focuses on allocation of hardware resources required by the scheduled hardware tasks. In this paper, we propose novel three-level resource management that investigates enhancement of placement quality by reducing task rejection, configuration overheads, and by optimizing resource utilization. Improving placement quality will produce significant enhancement of performance for scheduling and overall execution time of the application in FPGA. Hence, the placement problem is formulated into a constrained optimization problem and resolved with powerful solvers using the Branch and Bound method. The obtained results of an application of heterogeneous hardware tasks show an average resource utilization of 36% of the available resources on the reconfigurable region and an overall overhead of 11% of total application running time, and we have eliminated the issue of task rejection. Compared to static implementation, the gain in resource utilization within the reconfigurable region achieves up to 43%.http://dx.doi.org/10.1155/2010/980762 |
| spellingShingle | Ikbel Belaid Fabrice Muller Maher Benjemaa New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA International Journal of Reconfigurable Computing |
| title | New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA |
| title_full | New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA |
| title_fullStr | New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA |
| title_full_unstemmed | New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA |
| title_short | New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA |
| title_sort | new three level resource management enhancing quality of offline hardware task placement on fpga |
| url | http://dx.doi.org/10.1155/2010/980762 |
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