Analysis of GAA Junction Less NS FET Towards Analog and RF Applications at 30 nm Regime

Analysis of GAA Junction Less NS FET Towards Analog and RF Applications at 30 nm Regime

This research focuses on a quantum model created using an entirely novel nanosheet FET. The standard model describes the performance of a Gate-all-around (GAA) Junction-less (JL) nanosheet device with a gate dielectric of SiO<sub>2</sub> and HfO<sub>2</sub>, each having a thi...

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Bibliographic Details
Main Authors: Asisa Kumar Panigrahy, Sudheer Hanumanthakari, Shridhar B. Devamane, Shruti Bhargava Choubey, M. Prasad, D. Somasundaram, N. Kumareshan, N. Arun Vignesh, Gnanasaravanan Subramaniam, Durga Prakash M, Raghunandan Swain
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Open Journal of Nanotechnology
Subjects:
CMOS inverter
dielectrics
high-k
gate-all-around
quantum effects
transient analysis
Online Access:https://ieeexplore.ieee.org/document/10433722/
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https://ieeexplore.ieee.org/document/10433722/

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