Low-density parity-check representation of fault-tolerant quantum circuits
In fault-tolerant quantum computing, quantum algorithms are implemented through quantum circuits capable of error correction. These circuits are typically constructed based on specific quantum error correction codes, with consideration given to the characteristics of the underlying physical platform...
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| Format: | Article |
| Language: | English |
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American Physical Society
2025-01-01
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| Series: | Physical Review Research |
| Online Access: | http://doi.org/10.1103/PhysRevResearch.7.013115 |
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| author | Ying Li |
| author_facet | Ying Li |
| author_sort | Ying Li |
| collection | DOAJ |
| description | In fault-tolerant quantum computing, quantum algorithms are implemented through quantum circuits capable of error correction. These circuits are typically constructed based on specific quantum error correction codes, with consideration given to the characteristics of the underlying physical platforms. Optimizing these circuits within the constraints of today's quantum computing technologies, particularly in terms of error rates, qubit counts, and network topologies, holds substantial implications for the feasibility of quantum applications in the near future. This paper presents a toolkit for designing and analyzing fault-tolerant quantum circuits. We introduce a framework for representing stabilizer circuits using classical low-density parity-check (LDPC) codes. Each codeword in the representation corresponds to a quantum-mechanical equation regarding the circuit, formalizing the correlations utilized in parity checks and delineating logical operations within the circuit. Consequently, the LDPC code provides a means of quantifying fault tolerance and verifying logical operations. We outline the procedure for generating LDPC codes from circuits using the Tanner graph notation, alongside proposing graph-theory tools for constructing fault-tolerant quantum circuits from classical LDPC codes. These findings offer a systematic approach to applying classical error correction techniques in optimizing existing fault-tolerant protocols and developing new ones. As an example, we develop a resource-efficient scheme for universal fault-tolerant quantum computing on hypergraph product codes based on the LDPC representation. |
| format | Article |
| id | doaj-art-c112ea54cdec4e269c85e5e39bba8b19 |
| institution | Kabale University |
| issn | 2643-1564 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | American Physical Society |
| record_format | Article |
| series | Physical Review Research |
| spelling | doaj-art-c112ea54cdec4e269c85e5e39bba8b192025-01-30T16:51:26ZengAmerican Physical SocietyPhysical Review Research2643-15642025-01-017101311510.1103/PhysRevResearch.7.013115Low-density parity-check representation of fault-tolerant quantum circuitsYing LiIn fault-tolerant quantum computing, quantum algorithms are implemented through quantum circuits capable of error correction. These circuits are typically constructed based on specific quantum error correction codes, with consideration given to the characteristics of the underlying physical platforms. Optimizing these circuits within the constraints of today's quantum computing technologies, particularly in terms of error rates, qubit counts, and network topologies, holds substantial implications for the feasibility of quantum applications in the near future. This paper presents a toolkit for designing and analyzing fault-tolerant quantum circuits. We introduce a framework for representing stabilizer circuits using classical low-density parity-check (LDPC) codes. Each codeword in the representation corresponds to a quantum-mechanical equation regarding the circuit, formalizing the correlations utilized in parity checks and delineating logical operations within the circuit. Consequently, the LDPC code provides a means of quantifying fault tolerance and verifying logical operations. We outline the procedure for generating LDPC codes from circuits using the Tanner graph notation, alongside proposing graph-theory tools for constructing fault-tolerant quantum circuits from classical LDPC codes. These findings offer a systematic approach to applying classical error correction techniques in optimizing existing fault-tolerant protocols and developing new ones. As an example, we develop a resource-efficient scheme for universal fault-tolerant quantum computing on hypergraph product codes based on the LDPC representation.http://doi.org/10.1103/PhysRevResearch.7.013115 |
| spellingShingle | Ying Li Low-density parity-check representation of fault-tolerant quantum circuits Physical Review Research |
| title | Low-density parity-check representation of fault-tolerant quantum circuits |
| title_full | Low-density parity-check representation of fault-tolerant quantum circuits |
| title_fullStr | Low-density parity-check representation of fault-tolerant quantum circuits |
| title_full_unstemmed | Low-density parity-check representation of fault-tolerant quantum circuits |
| title_short | Low-density parity-check representation of fault-tolerant quantum circuits |
| title_sort | low density parity check representation of fault tolerant quantum circuits |
| url | http://doi.org/10.1103/PhysRevResearch.7.013115 |
| work_keys_str_mv | AT yingli lowdensityparitycheckrepresentationoffaulttolerantquantumcircuits |