Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performance
This study introduces the Variable Length Dual Dielectric Material-Gate Spacer Engineering Heterostructure Junction-Less Tunnel Field-Effect Transistor (VLDD-GSE-HJLTFET), a novel device that integrates advanced bandgap engineering, dual-dielectric gate configuration, and heterostructure design usin...
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| Language: | English |
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Elsevier
2025-03-01
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| Series: | Results in Engineering |
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| Online Access: | http://www.sciencedirect.com/science/article/pii/S2590123025001574 |
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| author | Pranita Soni Aditya Jain Kaushal Kumar Lokesh Kumar Soni Ajay Kumar Neha Gupta Amit Kumar Goyal Rakesh Saroha |
| author_facet | Pranita Soni Aditya Jain Kaushal Kumar Lokesh Kumar Soni Ajay Kumar Neha Gupta Amit Kumar Goyal Rakesh Saroha |
| author_sort | Pranita Soni |
| collection | DOAJ |
| description | This study introduces the Variable Length Dual Dielectric Material-Gate Spacer Engineering Heterostructure Junction-Less Tunnel Field-Effect Transistor (VLDD-GSE-HJLTFET), a novel device that integrates advanced bandgap engineering, dual-dielectric gate configuration, and heterostructure design using Si0.1Ge0.9/GaAs layers. The device employs variable region lengths, with a longer channel relative to the source and drain, to effectively mitigate short-channel effects. Key findings reveal that the VLDD-GSE-HJLTFET achieves ION ∼285 µA, which is four times higher than VLSD-GSE-HJLTFET (Variable Length Single Dielectric GSE-HJLTFET), with an ION/IOFF ratio improved by 2.8 times. The subthreshold swing (SS) is below 60 mV/decade, marking a 3 times improvement, while the threshold voltage (Vth) is 16.86 % and 28.06 % lower compared to VLSD-GSE-HJLTFET and Con-Si-JLTFET, respectively. For RF performance, the device demonstrates a 115 % higher cutoff frequency, 540 improvements in gain bandwidth product, and 2.67 times and 7.7 times faster intrinsic delay compared to VLSD-GSE-HJLTFET and Con-Si-JLTFET, respectively. Enhanced gate capacitances and superior intercept points further validate its suitability for high-frequency and low-power applications. The novelty lies in combining dual-dielectric spacer engineering, heterostructure material optimization, and a variable length configuration, establishing VLDD-GSE-HJLTFET as a breakthrough in low-power, high-frequency device design. |
| format | Article |
| id | doaj-art-bef24827669c4a8ba578de9f47684ee6 |
| institution | Kabale University |
| issn | 2590-1230 |
| language | English |
| publishDate | 2025-03-01 |
| publisher | Elsevier |
| record_format | Article |
| series | Results in Engineering |
| spelling | doaj-art-bef24827669c4a8ba578de9f47684ee62025-01-24T04:45:38ZengElsevierResults in Engineering2590-12302025-03-0125104069Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performancePranita Soni0Aditya Jain1Kaushal Kumar2Lokesh Kumar Soni3Ajay Kumar4Neha Gupta5Amit Kumar Goyal6Rakesh Saroha7Symbiosis Institute of Technology, Pune Campus, Symbiosis International (Deemed University), Pune, 412115, IndiaSymbiosis Institute of Technology, Pune Campus, Symbiosis International (Deemed University), Pune, 412115, India; Corresponding authors.Electronics and Communication Engineering Department, Graphic Era Deemed to be University, Dehradun, IndiaSymbiosis Institute of Technology, Pune Campus, Symbiosis International (Deemed University), Pune, 412115, India; Bharat Electronics Limited, Pune, IndiaElectronics and Communication Engineering Department, Jaypee Institute of Information Technology, Noida, IndiaDepartment of Applied Science and Humanity, Dronacharya Group of Institutions, Greater Noida, U.P. IndiaDepartment of Electronics and Communication Engineering, Manipal Institute of Technology, Manipal Academy of Higher Education, Manipal, 576104 India; Corresponding authors.Department of Engineering Chemistry, Chungbuk National University, Chungbuk 361-763, Republic of KoreaThis study introduces the Variable Length Dual Dielectric Material-Gate Spacer Engineering Heterostructure Junction-Less Tunnel Field-Effect Transistor (VLDD-GSE-HJLTFET), a novel device that integrates advanced bandgap engineering, dual-dielectric gate configuration, and heterostructure design using Si0.1Ge0.9/GaAs layers. The device employs variable region lengths, with a longer channel relative to the source and drain, to effectively mitigate short-channel effects. Key findings reveal that the VLDD-GSE-HJLTFET achieves ION ∼285 µA, which is four times higher than VLSD-GSE-HJLTFET (Variable Length Single Dielectric GSE-HJLTFET), with an ION/IOFF ratio improved by 2.8 times. The subthreshold swing (SS) is below 60 mV/decade, marking a 3 times improvement, while the threshold voltage (Vth) is 16.86 % and 28.06 % lower compared to VLSD-GSE-HJLTFET and Con-Si-JLTFET, respectively. For RF performance, the device demonstrates a 115 % higher cutoff frequency, 540 improvements in gain bandwidth product, and 2.67 times and 7.7 times faster intrinsic delay compared to VLSD-GSE-HJLTFET and Con-Si-JLTFET, respectively. Enhanced gate capacitances and superior intercept points further validate its suitability for high-frequency and low-power applications. The novelty lies in combining dual-dielectric spacer engineering, heterostructure material optimization, and a variable length configuration, establishing VLDD-GSE-HJLTFET as a breakthrough in low-power, high-frequency device design.http://www.sciencedirect.com/science/article/pii/S2590123025001574JLTFETDual-dielectric gateHeterogeneous materialCharge plasma conceptBand-to-band tunneling |
| spellingShingle | Pranita Soni Aditya Jain Kaushal Kumar Lokesh Kumar Soni Ajay Kumar Neha Gupta Amit Kumar Goyal Rakesh Saroha Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performance Results in Engineering JLTFET Dual-dielectric gate Heterogeneous material Charge plasma concept Band-to-band tunneling |
| title | Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performance |
| title_full | Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performance |
| title_fullStr | Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performance |
| title_full_unstemmed | Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performance |
| title_short | Implementation and comprehensive investigation of gate engineered Si0.1Ge0.9/GaAs charged plasma based JLTFET for improved analog/ RF performance |
| title_sort | implementation and comprehensive investigation of gate engineered si0 1ge0 9 gaas charged plasma based jltfet for improved analog rf performance |
| topic | JLTFET Dual-dielectric gate Heterogeneous material Charge plasma concept Band-to-band tunneling |
| url | http://www.sciencedirect.com/science/article/pii/S2590123025001574 |
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