Numerically Efficient and Accurate Analytical Converter Semiconductor Loss Calculation for Hybrid and Modular Multilevel Converters in VSC-HVDC Applications
This paper outlines a method enabling the quick and accurate calculation of semiconductor conduction and switching losses of multilevel voltage-sourced converters. The proposed method needs only the equations defining the voltages and currents of the converter’s stacks of submodules and d...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2024-01-01
|
| Series: | IEEE Open Access Journal of Power and Energy |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10646396/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | This paper outlines a method enabling the quick and accurate calculation of semiconductor conduction and switching losses of multilevel voltage-sourced converters. The proposed method needs only the equations defining the voltages and currents of the converter’s stacks of submodules and director switch valves to calculate the overall converter semiconductor losses, thereby accelerating the design cycle of novel converter topologies. For any defined operating point, the method quickly returns the semiconductor losses, making it straightforward to sweep across a converter’s range of operation, enabling quick comparison with other well-known, state-of-the-art converters. The method is derived for any generic multilevel converter, while examples of its application to the hybrid three-level converter, which is composed of both stacks and director switches, validate its accuracy. The method is further applied to the extended-overlap alternate-arm converter, also composed of stacks and director switches, providing further evidence of the method’s consistency. To validate the results, the semiconductor losses obtained from detailed simulations of a 600kV, 1GVA VSC-HVDC converter test system are compared against the proposed method, which demonstrate exceptional agreement. The relative errors in overall semiconductor losses between the simulation and the proposed method for the H3LC and EO-AAC are 0.76% and 0.94%, respectively. |
|---|---|
| ISSN: | 2687-7910 |