Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFET

Technology scaling below 22 nm has brought several detrimental effects such as increased short channel effects (SCEs) and leakage currents. In deep submicron technology further scaling in gate length and oxide thickness can be achieved by changing the device structure of MOSFET. For 10–30 nm channel...

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Main Authors: Satyam Shukla, Sandeep Singh Gill, Navneet Kaur, H. S. Jatana, Varun Nehru
Format: Article
Language:English
Published: Wiley 2017-01-01
Series:Active and Passive Electronic Components
Online Access:http://dx.doi.org/10.1155/2017/5947819
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author Satyam Shukla
Sandeep Singh Gill
Navneet Kaur
H. S. Jatana
Varun Nehru
author_facet Satyam Shukla
Sandeep Singh Gill
Navneet Kaur
H. S. Jatana
Varun Nehru
author_sort Satyam Shukla
collection DOAJ
description Technology scaling below 22 nm has brought several detrimental effects such as increased short channel effects (SCEs) and leakage currents. In deep submicron technology further scaling in gate length and oxide thickness can be achieved by changing the device structure of MOSFET. For 10–30 nm channel length multigate MOSFETs have been considered as most promising devices and FinFETs are the leading multigate MOSFET devices. Process parameters can be varied to obtain the desired performance of the FinFET device. In this paper, evaluation of on-off current ratio (Ion/Ioff), subthreshold swing (SS) and Drain Induced Barrier Lowering (DIBL) for different process parameters, that is, doping concentration (1015/cm3 to 1018/cm3), oxide thickness (0.5 nm and 1 nm), and fin height (10 nm to 40 nm), has been presented for 20 nm triangular FinFET device. Density gradient model used in design simulation incorporates the considerable quantum effects and provides more practical environment for device simulation. Simulation result shows that fin shape has great impact on FinFET performance and triangular fin shape leads to reduction in leakage current and SCEs. Comparative analysis of simulation results has been investigated to observe the impact of process parameters on the performance of designed FinFET.
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issn 0882-7516
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publishDate 2017-01-01
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series Active and Passive Electronic Components
spelling doaj-art-ba309799b5124e1e8b2b6c491b8a154e2025-02-03T01:00:58ZengWileyActive and Passive Electronic Components0882-75161563-50312017-01-01201710.1155/2017/59478195947819Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFETSatyam Shukla0Sandeep Singh Gill1Navneet Kaur2H. S. Jatana3Varun Nehru4Department of Electronic and Communication Engineering, Guru Nanak Dev Engineering College, Ludhiana 141006, IndiaDepartment of Electronic and Communication Engineering, Guru Nanak Dev Engineering College, Ludhiana 141006, IndiaDepartment of Electronic and Communication Engineering, Guru Nanak Dev Engineering College, Ludhiana 141006, IndiaSemi-Conductor Laboratory, Department of Space, Government of India, Mohali 160071, IndiaSemi-Conductor Laboratory, Department of Space, Government of India, Mohali 160071, IndiaTechnology scaling below 22 nm has brought several detrimental effects such as increased short channel effects (SCEs) and leakage currents. In deep submicron technology further scaling in gate length and oxide thickness can be achieved by changing the device structure of MOSFET. For 10–30 nm channel length multigate MOSFETs have been considered as most promising devices and FinFETs are the leading multigate MOSFET devices. Process parameters can be varied to obtain the desired performance of the FinFET device. In this paper, evaluation of on-off current ratio (Ion/Ioff), subthreshold swing (SS) and Drain Induced Barrier Lowering (DIBL) for different process parameters, that is, doping concentration (1015/cm3 to 1018/cm3), oxide thickness (0.5 nm and 1 nm), and fin height (10 nm to 40 nm), has been presented for 20 nm triangular FinFET device. Density gradient model used in design simulation incorporates the considerable quantum effects and provides more practical environment for device simulation. Simulation result shows that fin shape has great impact on FinFET performance and triangular fin shape leads to reduction in leakage current and SCEs. Comparative analysis of simulation results has been investigated to observe the impact of process parameters on the performance of designed FinFET.http://dx.doi.org/10.1155/2017/5947819
spellingShingle Satyam Shukla
Sandeep Singh Gill
Navneet Kaur
H. S. Jatana
Varun Nehru
Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFET
Active and Passive Electronic Components
title Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFET
title_full Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFET
title_fullStr Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFET
title_full_unstemmed Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFET
title_short Comparative Simulation Analysis of Process Parameter Variations in 20 nm Triangular FinFET
title_sort comparative simulation analysis of process parameter variations in 20 nm triangular finfet
url http://dx.doi.org/10.1155/2017/5947819
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AT navneetkaur comparativesimulationanalysisofprocessparametervariationsin20nmtriangularfinfet
AT hsjatana comparativesimulationanalysisofprocessparametervariationsin20nmtriangularfinfet
AT varunnehru comparativesimulationanalysisofprocessparametervariationsin20nmtriangularfinfet