Sparse Convolution FPGA Accelerator Based on Multi-Bank Hash Selection
Reconfigurable processor-based acceleration of deep convolutional neural network (DCNN) algorithms has emerged as a widely adopted technique, with particular attention on sparse neural network acceleration as an active research area. However, many computing devices that claim high computational powe...
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Main Authors: | Jia Xu, Han Pu, Dong Wang |
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Format: | Article |
Language: | English |
Published: |
MDPI AG
2024-12-01
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Series: | Micromachines |
Subjects: | |
Online Access: | https://www.mdpi.com/2072-666X/16/1/22 |
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