APA (7th ed.) Citation

Xu, J., Pu, H., & Wang, D. Sparse Convolution FPGA Accelerator Based on Multi-Bank Hash Selection. MDPI AG.

Chicago Style (17th ed.) Citation

Xu, Jia, Han Pu, and Dong Wang. Sparse Convolution FPGA Accelerator Based on Multi-Bank Hash Selection. MDPI AG.

MLA (9th ed.) Citation

Xu, Jia, et al. Sparse Convolution FPGA Accelerator Based on Multi-Bank Hash Selection. MDPI AG.