A radix‐8 modulo 2n multiplier using area and power‐optimized hard multiple generator
Abstract The moduli 2n multiplier plays a vital role in the design of a residue number system processor. When the radix‐8 booth‐encoded technique is adopted to design this kind of multipliers, the hard multiple generator is crucial in terms of area, power, and delay. This paper presents an area and...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2021-01-01
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| Series: | IET Computers & Digital Techniques |
| Subjects: | |
| Online Access: | https://doi.org/10.1049/cdt2.12001 |
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