Low Noise Amplifier at 60 GHz Using Low Loss On-Chip Inductors

This paper proposes the technique of using low loss on-chip inductors in the design of low noise amplifier (LNA) that offers high gain and lower noise figure. Upon the substrate of octagonal spiral inductors, a surface of patterned ground shield is inserted that significantly reduces the substrate l...

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Main Authors: Karthigha Balamurugan, M. Nirmala Devi, M. Jayakumar
Format: Article
Language:English
Published: Wiley 2023-01-01
Series:Journal of Electrical and Computer Engineering
Online Access:http://dx.doi.org/10.1155/2023/2469673
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_version_ 1832555351261577216
author Karthigha Balamurugan
M. Nirmala Devi
M. Jayakumar
author_facet Karthigha Balamurugan
M. Nirmala Devi
M. Jayakumar
author_sort Karthigha Balamurugan
collection DOAJ
description This paper proposes the technique of using low loss on-chip inductors in the design of low noise amplifier (LNA) that offers high gain and lower noise figure. Upon the substrate of octagonal spiral inductors, a surface of patterned ground shield is inserted that significantly reduces the substrate loss. This effect limits the penetration of electric filed into the substrate, thereby improving the inductor’s Quality (Q) factor and decouples the substrate parasitic that results with smaller series resistance. These effects result with improved gain and noise figure of LNA at 60 GHz when the designed inductors are included in it to serve as gate, source, and load inductances. The proposed work uses an inductively degenerated 3-stage common-source LNA in a 65-nm CMOS process. Simulation results show that the LNA using custom designed inductors achieves the peak gain of 17.02 dB at 56 GHz with a noise figure of 5 dB at 60 GHz for the power consumption of 10 mW. The figure-of-merit (FOM) is 14.56 which is 0.8 times more than the LNA design using off-chip inductors. A complete LNA layout using custom designed inductor footprints has been presented and analyzed.
format Article
id doaj-art-a9070386412d413dafce66636e1a74e2
institution Kabale University
issn 2090-0155
language English
publishDate 2023-01-01
publisher Wiley
record_format Article
series Journal of Electrical and Computer Engineering
spelling doaj-art-a9070386412d413dafce66636e1a74e22025-02-03T05:48:30ZengWileyJournal of Electrical and Computer Engineering2090-01552023-01-01202310.1155/2023/2469673Low Noise Amplifier at 60 GHz Using Low Loss On-Chip InductorsKarthigha Balamurugan0M. Nirmala Devi1M. Jayakumar2Department of Electronics and Communication EngineeringDepartment of Electronics and Communication EngineeringDepartment of Electronics and Communication EngineeringThis paper proposes the technique of using low loss on-chip inductors in the design of low noise amplifier (LNA) that offers high gain and lower noise figure. Upon the substrate of octagonal spiral inductors, a surface of patterned ground shield is inserted that significantly reduces the substrate loss. This effect limits the penetration of electric filed into the substrate, thereby improving the inductor’s Quality (Q) factor and decouples the substrate parasitic that results with smaller series resistance. These effects result with improved gain and noise figure of LNA at 60 GHz when the designed inductors are included in it to serve as gate, source, and load inductances. The proposed work uses an inductively degenerated 3-stage common-source LNA in a 65-nm CMOS process. Simulation results show that the LNA using custom designed inductors achieves the peak gain of 17.02 dB at 56 GHz with a noise figure of 5 dB at 60 GHz for the power consumption of 10 mW. The figure-of-merit (FOM) is 14.56 which is 0.8 times more than the LNA design using off-chip inductors. A complete LNA layout using custom designed inductor footprints has been presented and analyzed.http://dx.doi.org/10.1155/2023/2469673
spellingShingle Karthigha Balamurugan
M. Nirmala Devi
M. Jayakumar
Low Noise Amplifier at 60 GHz Using Low Loss On-Chip Inductors
Journal of Electrical and Computer Engineering
title Low Noise Amplifier at 60 GHz Using Low Loss On-Chip Inductors
title_full Low Noise Amplifier at 60 GHz Using Low Loss On-Chip Inductors
title_fullStr Low Noise Amplifier at 60 GHz Using Low Loss On-Chip Inductors
title_full_unstemmed Low Noise Amplifier at 60 GHz Using Low Loss On-Chip Inductors
title_short Low Noise Amplifier at 60 GHz Using Low Loss On-Chip Inductors
title_sort low noise amplifier at 60 ghz using low loss on chip inductors
url http://dx.doi.org/10.1155/2023/2469673
work_keys_str_mv AT karthighabalamurugan lownoiseamplifierat60ghzusinglowlossonchipinductors
AT mnirmaladevi lownoiseamplifierat60ghzusinglowlossonchipinductors
AT mjayakumar lownoiseamplifierat60ghzusinglowlossonchipinductors