Division-Free Multiquantization Scheme for Modern Video Codecs

The current trend of digital convergence leads to the need of the video encoder/decoder (codec) that should support multiple video standards on a single platform as it is expensive to use dedicated video codec chip for each standard. The paper presents a high performance circuit shared architecture...

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Main Authors: Mousumi Das, Atahar Mostafa, Khan Wahid
Format: Article
Language:English
Published: Wiley 2012-01-01
Series:Advances in Multimedia
Online Access:http://dx.doi.org/10.1155/2012/302893
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author Mousumi Das
Atahar Mostafa
Khan Wahid
author_facet Mousumi Das
Atahar Mostafa
Khan Wahid
author_sort Mousumi Das
collection DOAJ
description The current trend of digital convergence leads to the need of the video encoder/decoder (codec) that should support multiple video standards on a single platform as it is expensive to use dedicated video codec chip for each standard. The paper presents a high performance circuit shared architecture that can perform the quantization of five popular video codecs such as H.264/AVC, AVS, VC-1, MPEG-2/4, and JPEG. The proposed quantizer architecture is completely division-free as the division operation is replaced by shift and addition operations for all the standards. The design is implemented on FPGA and later synthesized in CMOS 0.18 μm technology. The results show that the proposed design satisfies the requirement of all five codecs with a maximum decoding capability of 60 fps at 187 MHz on Xilinx FPGA platform for 1080 p HD video.
format Article
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institution Kabale University
issn 1687-5680
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language English
publishDate 2012-01-01
publisher Wiley
record_format Article
series Advances in Multimedia
spelling doaj-art-a54c2fe46fa94152b1e8a3b8dcd977b52025-02-03T05:59:18ZengWileyAdvances in Multimedia1687-56801687-56992012-01-01201210.1155/2012/302893302893Division-Free Multiquantization Scheme for Modern Video CodecsMousumi Das0Atahar Mostafa1Khan Wahid2Department of Electrical and Computer Engineering, University of Saskatchewan Saskatoon, SK, S7N 5A9, CanadaDepartment of Electrical and Computer Engineering, University of Saskatchewan Saskatoon, SK, S7N 5A9, CanadaDepartment of Electrical and Computer Engineering, University of Saskatchewan Saskatoon, SK, S7N 5A9, CanadaThe current trend of digital convergence leads to the need of the video encoder/decoder (codec) that should support multiple video standards on a single platform as it is expensive to use dedicated video codec chip for each standard. The paper presents a high performance circuit shared architecture that can perform the quantization of five popular video codecs such as H.264/AVC, AVS, VC-1, MPEG-2/4, and JPEG. The proposed quantizer architecture is completely division-free as the division operation is replaced by shift and addition operations for all the standards. The design is implemented on FPGA and later synthesized in CMOS 0.18 μm technology. The results show that the proposed design satisfies the requirement of all five codecs with a maximum decoding capability of 60 fps at 187 MHz on Xilinx FPGA platform for 1080 p HD video.http://dx.doi.org/10.1155/2012/302893
spellingShingle Mousumi Das
Atahar Mostafa
Khan Wahid
Division-Free Multiquantization Scheme for Modern Video Codecs
Advances in Multimedia
title Division-Free Multiquantization Scheme for Modern Video Codecs
title_full Division-Free Multiquantization Scheme for Modern Video Codecs
title_fullStr Division-Free Multiquantization Scheme for Modern Video Codecs
title_full_unstemmed Division-Free Multiquantization Scheme for Modern Video Codecs
title_short Division-Free Multiquantization Scheme for Modern Video Codecs
title_sort division free multiquantization scheme for modern video codecs
url http://dx.doi.org/10.1155/2012/302893
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AT ataharmostafa divisionfreemultiquantizationschemeformodernvideocodecs
AT khanwahid divisionfreemultiquantizationschemeformodernvideocodecs