An Improved Phase-locked Loop Based on Second-order Generalized Integrator
Under ideal grid voltage conditions, single synchronous reference frame phase-locked loop (SSRF-PLL) enables fast and accurate phase/frequency detection, however, abnormal grid voltage conditions highly degrade its performance. To overcome this drawback, it presented an improved PLL based on second-...
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| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | zho |
| Published: |
Editorial Office of Control and Information Technology
2017-01-01
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| Series: | Kongzhi Yu Xinxi Jishu |
| Subjects: | |
| Online Access: | http://ctet.csrzic.com/thesisDetails#10.13889/j.issn.2095-3631.2017.02.200 |
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