An Improved Phase-locked Loop Based on Second-order Generalized Integrator
Under ideal grid voltage conditions, single synchronous reference frame phase-locked loop (SSRF-PLL) enables fast and accurate phase/frequency detection, however, abnormal grid voltage conditions highly degrade its performance. To overcome this drawback, it presented an improved PLL based on second-...
Saved in:
| Main Authors: | , , , , , |
|---|---|
| Format: | Article |
| Language: | zho |
| Published: |
Editorial Office of Control and Information Technology
2017-01-01
|
| Series: | Kongzhi Yu Xinxi Jishu |
| Subjects: | |
| Online Access: | http://ctet.csrzic.com/thesisDetails#10.13889/j.issn.2095-3631.2017.02.200 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1849224818347474944 |
|---|---|
| author | QIU Lebing TANG Jianyu CAO Yang LUO Renjun XU Wanliang LIN Li |
| author_facet | QIU Lebing TANG Jianyu CAO Yang LUO Renjun XU Wanliang LIN Li |
| author_sort | QIU Lebing |
| collection | DOAJ |
| description | Under ideal grid voltage conditions, single synchronous reference frame phase-locked loop (SSRF-PLL) enables fast and accurate phase/frequency detection, however, abnormal grid voltage conditions highly degrade its performance. To overcome this drawback, it presented an improved PLL based on second-order generalized integrator (SOGI). The extraction of DC component is performed by the definite integral operation, and then the phase error caused by the DC offset can be eliminated. By the accurate estimation of frequency and parameter tuning, the resonance frequency of SOGI is adaptive to the grid frequency variation. The stability margin, dynamics response, and disturbance rejection ability are the critical factors that are considered in parameters optimization. Simulation and experimental results show that the PLL has excellent performance under non-ideal grid voltage conditions including voltage asymmetry, harmonics, frequency varying and DC offset. |
| format | Article |
| id | doaj-art-a513ba8d2ccc4d8aa179639eef13d29a |
| institution | Kabale University |
| issn | 2096-5427 |
| language | zho |
| publishDate | 2017-01-01 |
| publisher | Editorial Office of Control and Information Technology |
| record_format | Article |
| series | Kongzhi Yu Xinxi Jishu |
| spelling | doaj-art-a513ba8d2ccc4d8aa179639eef13d29a2025-08-25T06:52:15ZzhoEditorial Office of Control and Information TechnologyKongzhi Yu Xinxi Jishu2096-54272017-01-0134616782334438An Improved Phase-locked Loop Based on Second-order Generalized IntegratorQIU LebingTANG JianyuCAO YangLUO RenjunXU WanliangLIN LiUnder ideal grid voltage conditions, single synchronous reference frame phase-locked loop (SSRF-PLL) enables fast and accurate phase/frequency detection, however, abnormal grid voltage conditions highly degrade its performance. To overcome this drawback, it presented an improved PLL based on second-order generalized integrator (SOGI). The extraction of DC component is performed by the definite integral operation, and then the phase error caused by the DC offset can be eliminated. By the accurate estimation of frequency and parameter tuning, the resonance frequency of SOGI is adaptive to the grid frequency variation. The stability margin, dynamics response, and disturbance rejection ability are the critical factors that are considered in parameters optimization. Simulation and experimental results show that the PLL has excellent performance under non-ideal grid voltage conditions including voltage asymmetry, harmonics, frequency varying and DC offset.http://ctet.csrzic.com/thesisDetails#10.13889/j.issn.2095-3631.2017.02.200SOGIPLLfrequency adaptive controlDC offset |
| spellingShingle | QIU Lebing TANG Jianyu CAO Yang LUO Renjun XU Wanliang LIN Li An Improved Phase-locked Loop Based on Second-order Generalized Integrator Kongzhi Yu Xinxi Jishu SOGI PLL frequency adaptive control DC offset |
| title | An Improved Phase-locked Loop Based on Second-order Generalized Integrator |
| title_full | An Improved Phase-locked Loop Based on Second-order Generalized Integrator |
| title_fullStr | An Improved Phase-locked Loop Based on Second-order Generalized Integrator |
| title_full_unstemmed | An Improved Phase-locked Loop Based on Second-order Generalized Integrator |
| title_short | An Improved Phase-locked Loop Based on Second-order Generalized Integrator |
| title_sort | improved phase locked loop based on second order generalized integrator |
| topic | SOGI PLL frequency adaptive control DC offset |
| url | http://ctet.csrzic.com/thesisDetails#10.13889/j.issn.2095-3631.2017.02.200 |
| work_keys_str_mv | AT qiulebing animprovedphaselockedloopbasedonsecondordergeneralizedintegrator AT tangjianyu animprovedphaselockedloopbasedonsecondordergeneralizedintegrator AT caoyang animprovedphaselockedloopbasedonsecondordergeneralizedintegrator AT luorenjun animprovedphaselockedloopbasedonsecondordergeneralizedintegrator AT xuwanliang animprovedphaselockedloopbasedonsecondordergeneralizedintegrator AT linli animprovedphaselockedloopbasedonsecondordergeneralizedintegrator AT qiulebing improvedphaselockedloopbasedonsecondordergeneralizedintegrator AT tangjianyu improvedphaselockedloopbasedonsecondordergeneralizedintegrator AT caoyang improvedphaselockedloopbasedonsecondordergeneralizedintegrator AT luorenjun improvedphaselockedloopbasedonsecondordergeneralizedintegrator AT xuwanliang improvedphaselockedloopbasedonsecondordergeneralizedintegrator AT linli improvedphaselockedloopbasedonsecondordergeneralizedintegrator |