System Architecture for Real-Time Face Detection on Analog Video Camera
This paper proposes a novel hardware architecture for real-time face detection, which is efficient and suitable for embedded systems. The proposed architecture is based on AdaBoost learning algorithm with Haar-like features and it aims to apply face detection to a low-cost FPGA that can be applied t...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2015-05-01
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| Series: | International Journal of Distributed Sensor Networks |
| Online Access: | https://doi.org/10.1155/2015/251386 |
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| _version_ | 1850169640902197248 |
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| author | Mooseop Kim Deokgyu Lee Ki-Young Kim |
| author_facet | Mooseop Kim Deokgyu Lee Ki-Young Kim |
| author_sort | Mooseop Kim |
| collection | DOAJ |
| description | This paper proposes a novel hardware architecture for real-time face detection, which is efficient and suitable for embedded systems. The proposed architecture is based on AdaBoost learning algorithm with Haar-like features and it aims to apply face detection to a low-cost FPGA that can be applied to a legacy analog video camera as a target platform. We propose an efficient method to calculate the integral image using the cumulative line sum. We also suggest an alternative method to avoid division, which requires many operations to calculate the standard deviation. A detailed structure of system elements for image scale, integral image generator, and pipelined classifier that purposed to optimize the efficiency between the processing speed and the hardware resources is presented. The performance of the proposed architecture is described in comparison with the detection results of OpenCV using the same input images. For verification of the actual face detection on analog cameras, we designed an emulation platform using a low-cost Spartan-3 FPGA and then experimented the proposed architecture. The experimental results show that the processing time for face detection on analog video camera is 42 frames per second, which is about 3 times faster than previous works for low-cost face detection. |
| format | Article |
| id | doaj-art-a189df84857d4b50a1f7f63cad0c23d4 |
| institution | OA Journals |
| issn | 1550-1477 |
| language | English |
| publishDate | 2015-05-01 |
| publisher | Wiley |
| record_format | Article |
| series | International Journal of Distributed Sensor Networks |
| spelling | doaj-art-a189df84857d4b50a1f7f63cad0c23d42025-08-20T02:20:41ZengWileyInternational Journal of Distributed Sensor Networks1550-14772015-05-011110.1155/2015/251386251386System Architecture for Real-Time Face Detection on Analog Video CameraMooseop Kim0Deokgyu Lee1Ki-Young Kim2 Creative Future Research Laboratory, Electronics and Telecommunications Research Institute, 138 Gajeongno, Yuseong-gu, Daejeon 305-700, Republic of Korea Department of Information Security, Seowon University, 377-3 Musimseo-ro, Seowon-gu, Cheongju-si, Chungbuk 361-742, Republic of Korea Creative Future Research Laboratory, Electronics and Telecommunications Research Institute, 138 Gajeongno, Yuseong-gu, Daejeon 305-700, Republic of KoreaThis paper proposes a novel hardware architecture for real-time face detection, which is efficient and suitable for embedded systems. The proposed architecture is based on AdaBoost learning algorithm with Haar-like features and it aims to apply face detection to a low-cost FPGA that can be applied to a legacy analog video camera as a target platform. We propose an efficient method to calculate the integral image using the cumulative line sum. We also suggest an alternative method to avoid division, which requires many operations to calculate the standard deviation. A detailed structure of system elements for image scale, integral image generator, and pipelined classifier that purposed to optimize the efficiency between the processing speed and the hardware resources is presented. The performance of the proposed architecture is described in comparison with the detection results of OpenCV using the same input images. For verification of the actual face detection on analog cameras, we designed an emulation platform using a low-cost Spartan-3 FPGA and then experimented the proposed architecture. The experimental results show that the processing time for face detection on analog video camera is 42 frames per second, which is about 3 times faster than previous works for low-cost face detection.https://doi.org/10.1155/2015/251386 |
| spellingShingle | Mooseop Kim Deokgyu Lee Ki-Young Kim System Architecture for Real-Time Face Detection on Analog Video Camera International Journal of Distributed Sensor Networks |
| title | System Architecture for Real-Time Face Detection on Analog Video Camera |
| title_full | System Architecture for Real-Time Face Detection on Analog Video Camera |
| title_fullStr | System Architecture for Real-Time Face Detection on Analog Video Camera |
| title_full_unstemmed | System Architecture for Real-Time Face Detection on Analog Video Camera |
| title_short | System Architecture for Real-Time Face Detection on Analog Video Camera |
| title_sort | system architecture for real time face detection on analog video camera |
| url | https://doi.org/10.1155/2015/251386 |
| work_keys_str_mv | AT mooseopkim systemarchitectureforrealtimefacedetectiononanalogvideocamera AT deokgyulee systemarchitectureforrealtimefacedetectiononanalogvideocamera AT kiyoungkim systemarchitectureforrealtimefacedetectiononanalogvideocamera |