A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications
This paper presents a successive approximation register analog-to-digital converter (SAR ADC) specifically optimized for brain–computer interface (BCI) applications. Designed and post-layout-simulated using 180 nm CMOS technology, the proposed SAR ADC achieves a 13.44-bit effective number of bits (E...
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MDPI AG
2025-05-01
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| author | Hongyuan Yang Jiahao Cheong Cheng Liu |
| author_facet | Hongyuan Yang Jiahao Cheong Cheng Liu |
| author_sort | Hongyuan Yang |
| collection | DOAJ |
| description | This paper presents a successive approximation register analog-to-digital converter (SAR ADC) specifically optimized for brain–computer interface (BCI) applications. Designed and post-layout-simulated using 180 nm CMOS technology, the proposed SAR ADC achieves a 13.44-bit effective number of bits (ENOB) and 27.9 μW of power consumption at a supply voltage of 1.8 V, enabled by a piecewise monotonic switching scheme and dynamic logic architecture. The ADC supports a high input range of ±500 mV, making it suitable for neural signal acquisition. Through an optimized capacitive digital-to-analog converter (CDAC) array and a high-speed dynamic comparator, the ADC demonstrates a signal-to-noise-and-distortion ratio (SINAD) of 81.94 dB and a spurious-free dynamic range (SFDR) of 91.69 dBc at a sampling rate of 320 kS/s. Experimental results validate the design’s superior performance in terms of low-power operation, high resolution, and moderate sampling rate, positioning it as a competitive solution for high-density integration and precision neural signal processing in next-generation BCI systems. |
| format | Article |
| id | doaj-art-a016d1a7f8d346dabbe6ca2a2f19737b |
| institution | OA Journals |
| issn | 2076-3417 |
| language | English |
| publishDate | 2025-05-01 |
| publisher | MDPI AG |
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| series | Applied Sciences |
| spelling | doaj-art-a016d1a7f8d346dabbe6ca2a2f19737b2025-08-20T02:33:39ZengMDPI AGApplied Sciences2076-34172025-05-011510549410.3390/app15105494A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface ApplicationsHongyuan Yang0Jiahao Cheong1Cheng Liu2School of Microelectronics, Shanghai University, Shanghai 201800, ChinaMTRIX Corporation, Shanghai 201800, ChinaSchool of Microelectronics, Shanghai University, Shanghai 201800, ChinaThis paper presents a successive approximation register analog-to-digital converter (SAR ADC) specifically optimized for brain–computer interface (BCI) applications. Designed and post-layout-simulated using 180 nm CMOS technology, the proposed SAR ADC achieves a 13.44-bit effective number of bits (ENOB) and 27.9 μW of power consumption at a supply voltage of 1.8 V, enabled by a piecewise monotonic switching scheme and dynamic logic architecture. The ADC supports a high input range of ±500 mV, making it suitable for neural signal acquisition. Through an optimized capacitive digital-to-analog converter (CDAC) array and a high-speed dynamic comparator, the ADC demonstrates a signal-to-noise-and-distortion ratio (SINAD) of 81.94 dB and a spurious-free dynamic range (SFDR) of 91.69 dBc at a sampling rate of 320 kS/s. Experimental results validate the design’s superior performance in terms of low-power operation, high resolution, and moderate sampling rate, positioning it as a competitive solution for high-density integration and precision neural signal processing in next-generation BCI systems.https://www.mdpi.com/2076-3417/15/10/5494BCISAR ADClow power |
| spellingShingle | Hongyuan Yang Jiahao Cheong Cheng Liu A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications Applied Sciences BCI SAR ADC low power |
| title | A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications |
| title_full | A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications |
| title_fullStr | A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications |
| title_full_unstemmed | A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications |
| title_short | A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications |
| title_sort | 13 44 bit low power sar adc for brain computer interface applications |
| topic | BCI SAR ADC low power |
| url | https://www.mdpi.com/2076-3417/15/10/5494 |
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