Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifier
Abstract Epilepsy is one of the most common neurological disorders; it affects millions of people globally. Because of the risks to health that it causes, the study and analysis of epilepsy have been given considerable attention in the biomedical field. In a neurological diagnosis, an automated devi...
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| Format: | Article |
| Language: | English |
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Wiley
2022-01-01
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| Series: | IET Circuits, Devices and Systems |
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| Online Access: | https://doi.org/10.1049/cds2.12077 |
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| author | Shalini Shanmugam Selvathi Dharmar |
| author_facet | Shalini Shanmugam Selvathi Dharmar |
| author_sort | Shalini Shanmugam |
| collection | DOAJ |
| description | Abstract Epilepsy is one of the most common neurological disorders; it affects millions of people globally. Because of the risks to health that it causes, the study and analysis of epilepsy have been given considerable attention in the biomedical field. In a neurological diagnosis, an automated device for detecting seizures or epilepsy from an electroencephalogram (EEG) signal has a significant role. This research work proposes a very large scale integration implementation system for the automatic detection of seizures. Before classification, feature extraction was performed by discrete wavelet transform (DWT) and on‐chip classification was performed by a linear support vector machine. The polyphase architecture of Daubechies fourth‐order wavelet three‐level DWT was used to minimize computational time. The systolic array architecture‐based support vector machine classifier using parallel processing helps to minimize the computational complexity of the proposed method. This research work uses an open access EEG dataset. Hardware implementation was done on a field‐programmable gate array (FPGA). Efficient results were produced compared with the existing system on chip (SoC) and FPGA seizure detection systems. |
| format | Article |
| id | doaj-art-9ed66f7132a74afba0d058de9a7d91e9 |
| institution | Kabale University |
| issn | 1751-858X 1751-8598 |
| language | English |
| publishDate | 2022-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | IET Circuits, Devices and Systems |
| spelling | doaj-art-9ed66f7132a74afba0d058de9a7d91e92025-02-03T01:29:37ZengWileyIET Circuits, Devices and Systems1751-858X1751-85982022-01-0116111210.1049/cds2.12077Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifierShalini Shanmugam0Selvathi Dharmar1Department of Electronics & Communication Engineering Mepco Schlenk Engineering College SivakasiTamil Nadu IndiaDepartment of Electronics & Communication Engineering Mepco Schlenk Engineering College SivakasiTamil Nadu IndiaAbstract Epilepsy is one of the most common neurological disorders; it affects millions of people globally. Because of the risks to health that it causes, the study and analysis of epilepsy have been given considerable attention in the biomedical field. In a neurological diagnosis, an automated device for detecting seizures or epilepsy from an electroencephalogram (EEG) signal has a significant role. This research work proposes a very large scale integration implementation system for the automatic detection of seizures. Before classification, feature extraction was performed by discrete wavelet transform (DWT) and on‐chip classification was performed by a linear support vector machine. The polyphase architecture of Daubechies fourth‐order wavelet three‐level DWT was used to minimize computational time. The systolic array architecture‐based support vector machine classifier using parallel processing helps to minimize the computational complexity of the proposed method. This research work uses an open access EEG dataset. Hardware implementation was done on a field‐programmable gate array (FPGA). Efficient results were produced compared with the existing system on chip (SoC) and FPGA seizure detection systems.https://doi.org/10.1049/cds2.12077electroencephalographysupport vector machinesfeature extractionneurophysiologysystolic arrayswavelet transforms |
| spellingShingle | Shalini Shanmugam Selvathi Dharmar Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifier IET Circuits, Devices and Systems electroencephalography support vector machines feature extraction neurophysiology systolic arrays wavelet transforms |
| title | Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifier |
| title_full | Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifier |
| title_fullStr | Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifier |
| title_full_unstemmed | Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifier |
| title_short | Very large scale integration implementation of seizure detection system with on‐chip support vector machine classifier |
| title_sort | very large scale integration implementation of seizure detection system with on chip support vector machine classifier |
| topic | electroencephalography support vector machines feature extraction neurophysiology systolic arrays wavelet transforms |
| url | https://doi.org/10.1049/cds2.12077 |
| work_keys_str_mv | AT shalinishanmugam verylargescaleintegrationimplementationofseizuredetectionsystemwithonchipsupportvectormachineclassifier AT selvathidharmar verylargescaleintegrationimplementationofseizuredetectionsystemwithonchipsupportvectormachineclassifier |