APA (7th ed.) Citation

Singh, A., Rawat, V., & Agarwal, A. Low‐power 10‐bit 100 MS/s pipelined ADC in digital CMOS technology. Wiley.

Chicago Style (17th ed.) Citation

Singh, Anil, Veena Rawat, and Alpana Agarwal. Low‐power 10‐bit 100 MS/s Pipelined ADC in Digital CMOS Technology. Wiley.

MLA (9th ed.) Citation

Singh, Anil, et al. Low‐power 10‐bit 100 MS/s Pipelined ADC in Digital CMOS Technology. Wiley.

Warning: These citations may not always be 100% accurate.