A Method for Synthesizing Ultra-Large-Scale Clock Trees
As integrated circuit technology continues to advance, clock tree synthesis has become increasingly significant in the design of ultra-large-scale integrated circuits. Traditional clock tree synthesis methods often face challenges such as insufficient computational resources and buffer fan-out limit...
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| Main Authors: | Ziheng Li, Benyuan Chen, Wanting Wang, Hui Lv, Qinghua Lv, Jie Chen, Yan Wang, Juan Li, Cheng Zhang |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2025-04-01
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| Series: | Algorithms |
| Subjects: | |
| Online Access: | https://www.mdpi.com/1999-4893/18/5/249 |
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