Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling
Neural Compact Models (NCMs) have emerged as a crucial tool to meet the stringent demands of Design-Technology Co-Optimization (DTCO) and to overcome the complexities and prolonged development cycles encountered in traditional compact model creation. Despite their efficiency in simulating electronic...
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IEEE
2024-01-01
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Series: | IEEE Journal of the Electron Devices Society |
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Online Access: | https://ieeexplore.ieee.org/document/10547540/ |
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author | Chanwoo Park Hyunbo Cho Jungwoo Lee |
author_facet | Chanwoo Park Hyunbo Cho Jungwoo Lee |
author_sort | Chanwoo Park |
collection | DOAJ |
description | Neural Compact Models (NCMs) have emerged as a crucial tool to meet the stringent demands of Design-Technology Co-Optimization (DTCO) and to overcome the complexities and prolonged development cycles encountered in traditional compact model creation. Despite their efficiency in simulating electronic devices, a significant barrier to the widespread adoption of NCMs in the industry remains: the lack of interpretability. In the semiconductor sector, where inaccuracies or failures can lead to considerable financial consequences, it is critical to ensure that the model’s predictions are both understandable and reliable. This study aims to enhance the interpretability of NCMs used for I-V and C-V characterizations by clarifying the physical significance of latent vectors. A regularization technique is employed to disentangle features within the latent space, and interpolation is used to visualize and elucidate each dimension’s physical impact. Our approach, which offers interpretable insights into the model’s functionality, seeks to encourage broader implementation of NCMs in the industry, thus accelerating advancements in DTCO. |
format | Article |
id | doaj-art-8e362d1f2b75420297ce1ef9640ab19f |
institution | Kabale University |
issn | 2168-6734 |
language | English |
publishDate | 2024-01-01 |
publisher | IEEE |
record_format | Article |
series | IEEE Journal of the Electron Devices Society |
spelling | doaj-art-8e362d1f2b75420297ce1ef9640ab19f2025-01-29T00:00:15ZengIEEEIEEE Journal of the Electron Devices Society2168-67342024-01-011249550110.1109/JEDS.2024.340957210547540Enhancing Interpretability of Neural Compact Models: Toward Reliable Device ModelingChanwoo Park0https://orcid.org/0000-0001-7321-0269Hyunbo Cho1https://orcid.org/0009-0006-0425-5301Jungwoo Lee2https://orcid.org/0000-0002-6804-980XDepartment of Electrical and Computer Engineering, Seoul National University, Seoul, South KoreaResearch and Development Center, Alsemy Inc., Seoul, South KoreaDepartment of Electrical and Computer Engineering, Seoul National University, Seoul, South KoreaNeural Compact Models (NCMs) have emerged as a crucial tool to meet the stringent demands of Design-Technology Co-Optimization (DTCO) and to overcome the complexities and prolonged development cycles encountered in traditional compact model creation. Despite their efficiency in simulating electronic devices, a significant barrier to the widespread adoption of NCMs in the industry remains: the lack of interpretability. In the semiconductor sector, where inaccuracies or failures can lead to considerable financial consequences, it is critical to ensure that the model’s predictions are both understandable and reliable. This study aims to enhance the interpretability of NCMs used for I-V and C-V characterizations by clarifying the physical significance of latent vectors. A regularization technique is employed to disentangle features within the latent space, and interpolation is used to visualize and elucidate each dimension’s physical impact. Our approach, which offers interpretable insights into the model’s functionality, seeks to encourage broader implementation of NCMs in the industry, thus accelerating advancements in DTCO.https://ieeexplore.ieee.org/document/10547540/Neural compact modelsinterpretabilitylatent vector interpolationdesign-technology co-optimization |
spellingShingle | Chanwoo Park Hyunbo Cho Jungwoo Lee Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling IEEE Journal of the Electron Devices Society Neural compact models interpretability latent vector interpolation design-technology co-optimization |
title | Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling |
title_full | Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling |
title_fullStr | Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling |
title_full_unstemmed | Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling |
title_short | Enhancing Interpretability of Neural Compact Models: Toward Reliable Device Modeling |
title_sort | enhancing interpretability of neural compact models toward reliable device modeling |
topic | Neural compact models interpretability latent vector interpolation design-technology co-optimization |
url | https://ieeexplore.ieee.org/document/10547540/ |
work_keys_str_mv | AT chanwoopark enhancinginterpretabilityofneuralcompactmodelstowardreliabledevicemodeling AT hyunbocho enhancinginterpretabilityofneuralcompactmodelstowardreliabledevicemodeling AT jungwoolee enhancinginterpretabilityofneuralcompactmodelstowardreliabledevicemodeling |