2D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1
Abstract Along with continuous size shrinking, conventional silicon based transistors face the the challenges of both manufacture complexity and physical limitations. The negative capacitance transistors (NC‐FETs) using 2D ferroelectric materials as dielectric insulators are emerging as reliable sol...
Saved in:
| Main Authors: | , , , , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley-VCH
2025-05-01
|
| Series: | Advanced Electronic Materials |
| Subjects: | |
| Online Access: | https://doi.org/10.1002/aelm.202400685 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1850150736087744512 |
|---|---|
| author | Yujue Yang Zihao Liu Xueting Liu Huafeng Dong Xin Zhang Juehan Yang Fugen Wu Jingbo Li Nengjie Huo |
| author_facet | Yujue Yang Zihao Liu Xueting Liu Huafeng Dong Xin Zhang Juehan Yang Fugen Wu Jingbo Li Nengjie Huo |
| author_sort | Yujue Yang |
| collection | DOAJ |
| description | Abstract Along with continuous size shrinking, conventional silicon based transistors face the the challenges of both manufacture complexity and physical limitations. The negative capacitance transistors (NC‐FETs) using 2D ferroelectric materials as dielectric insulators are emerging as reliable solutions owing to their advantages of breaking the Boltzmann limitation and Complementary Metal‐Oxide Semiconductor (CMOS) compatibility. Here, the room temperature ferroelectricity of 2D AgInP2Se6 is discovered which is further integrated with MoS2 channel into ultra‐steep NC‐FETs for low‐power electronic applications. Due to the negative capacitance effect of AgInP2Se6 during the polarization reversal process, the transistor breaks the Boltzmann limitation with a subthreshold swing (SS) of less than 10 mV decade−1. By optimizing the thickness of AgInP2Se6, superior transistor performance with a minimum SS of 7.75 mV dec−1 and a high on/off ratio of up to 5.88 × 104 can be achieved. This work develops a new 2D ferroelectric AgInP2Se6 with room temperature ferroelectricity, providing promising material platforms for small‐size, ultra‐steep, and low‐power electronics. |
| format | Article |
| id | doaj-art-8dba4ad98d9c4550a98741b0ca73a0f4 |
| institution | OA Journals |
| issn | 2199-160X |
| language | English |
| publishDate | 2025-05-01 |
| publisher | Wiley-VCH |
| record_format | Article |
| series | Advanced Electronic Materials |
| spelling | doaj-art-8dba4ad98d9c4550a98741b0ca73a0f42025-08-20T02:26:27ZengWiley-VCHAdvanced Electronic Materials2199-160X2025-05-01117n/an/a10.1002/aelm.2024006852D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1Yujue Yang0Zihao Liu1Xueting Liu2Huafeng Dong3Xin Zhang4Juehan Yang5Fugen Wu6Jingbo Li7Nengjie Huo8School of Physics and Optoelectronic Engineering Guangdong University of Technology Guangzhou 510006 P. R. ChinaSchool of Physics and Optoelectronic Engineering Guangdong University of Technology Guangzhou 510006 P. R. ChinaGuangdong Provincial Key Laboratory of Chip and Integration Technology School of Electronic Science and Engineering South China Normal University Foshan 528225 P. R. ChinaSchool of Physics and Optoelectronic Engineering Guangdong University of Technology Guangzhou 510006 P. R. ChinaSchool of Physics and Optoelectronic Engineering Guangdong University of Technology Guangzhou 510006 P. R. ChinaInstitute of Semiconductors Chinese Academy of Sciences Beijing 100083 ChinaSchool of Physics and Optoelectronic Engineering Guangdong University of Technology Guangzhou 510006 P. R. ChinaCollege of Optical Science and Engineering Zhejiang University Hangzhou 310027 P. R. ChinaGuangdong Provincial Key Laboratory of Chip and Integration Technology School of Electronic Science and Engineering South China Normal University Foshan 528225 P. R. ChinaAbstract Along with continuous size shrinking, conventional silicon based transistors face the the challenges of both manufacture complexity and physical limitations. The negative capacitance transistors (NC‐FETs) using 2D ferroelectric materials as dielectric insulators are emerging as reliable solutions owing to their advantages of breaking the Boltzmann limitation and Complementary Metal‐Oxide Semiconductor (CMOS) compatibility. Here, the room temperature ferroelectricity of 2D AgInP2Se6 is discovered which is further integrated with MoS2 channel into ultra‐steep NC‐FETs for low‐power electronic applications. Due to the negative capacitance effect of AgInP2Se6 during the polarization reversal process, the transistor breaks the Boltzmann limitation with a subthreshold swing (SS) of less than 10 mV decade−1. By optimizing the thickness of AgInP2Se6, superior transistor performance with a minimum SS of 7.75 mV dec−1 and a high on/off ratio of up to 5.88 × 104 can be achieved. This work develops a new 2D ferroelectric AgInP2Se6 with room temperature ferroelectricity, providing promising material platforms for small‐size, ultra‐steep, and low‐power electronics.https://doi.org/10.1002/aelm.202400685AgInP2Se6ferroelectricsubthreshold swing, transistorultra‐steep slope |
| spellingShingle | Yujue Yang Zihao Liu Xueting Liu Huafeng Dong Xin Zhang Juehan Yang Fugen Wu Jingbo Li Nengjie Huo 2D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1 Advanced Electronic Materials AgInP2Se6 ferroelectric subthreshold swing, transistor ultra‐steep slope |
| title | 2D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1 |
| title_full | 2D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1 |
| title_fullStr | 2D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1 |
| title_full_unstemmed | 2D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1 |
| title_short | 2D ferroelectric AgInP2Se6 for Ultra‐Steep Slope Transistor with SS Below 10 mV Decade−1 |
| title_sort | 2d ferroelectric aginp2se6 for ultra steep slope transistor with ss below 10 mv decade 1 |
| topic | AgInP2Se6 ferroelectric subthreshold swing, transistor ultra‐steep slope |
| url | https://doi.org/10.1002/aelm.202400685 |
| work_keys_str_mv | AT yujueyang 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT zihaoliu 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT xuetingliu 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT huafengdong 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT xinzhang 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT juehanyang 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT fugenwu 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT jingboli 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 AT nengjiehuo 2dferroelectricaginp2se6forultrasteepslopetransistorwithssbelow10mvdecade1 |