Single‐ended 2 ch. × 3.4 Gbit/s dual‐mode near‐ground transmitter IO driver in 45 nm CMOS process
A smart dual‐mode IO driver and termination scheme is proposed and power is efficiently consumed for both low‐speed data transmission under 500 Mbit/s and high‐speed data transmission up to 3.4 Gbit/s. During high speed data transmission, the driver uses near‐ground signalling and pre‐emphasis weigh...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2017-03-01
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| Series: | Electronics Letters |
| Subjects: | |
| Online Access: | https://doi.org/10.1049/el.2016.4290 |
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| Summary: | A smart dual‐mode IO driver and termination scheme is proposed and power is efficiently consumed for both low‐speed data transmission under 500 Mbit/s and high‐speed data transmission up to 3.4 Gbit/s. During high speed data transmission, the driver uses near‐ground signalling and pre‐emphasis weight can be controlled for inter symbol interference (ISI) mitigation. The measured eye shows 17.8% vertically and 19.5% horizontally with finite impulse response (FIR) tap control for 15.75″ FR4 channel. The proto‐type 2 channel single‐ended driver has been implemented in 45 nm CMOS process and occupies 0.022 mm2 chip area. |
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| ISSN: | 0013-5194 1350-911X |