Stego on FPGA: An IWT Approach

Stego on FPGA: An IWT Approach

A reconfigurable hardware architecture for the implementation of integer wavelet transform (IWT) based adaptive random image steganography algorithm is proposed. The Haar-IWT was used to separate the subbands namely, LL, LH, HL, and HH, from 8×8 pixel blocks and the encrypted secret data is hidden i...

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Bibliographic Details
Main Authors:	Balakrishnan Ramalingam, Rengarajan Amirtharajan, John Bosco Balaguru Rayappan
Format:	Article
Language:	English
Published:	Wiley 2014-01-01
Series:	The Scientific World Journal
Online Access:	http://dx.doi.org/10.1155/2014/192512
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