Ramalingam, B., Amirtharajan, R., & Rayappan, J. B. B. Stego on FPGA: An IWT Approach. Wiley.
Chicago Style (17th ed.) CitationRamalingam, Balakrishnan, Rengarajan Amirtharajan, and John Bosco Balaguru Rayappan. Stego on FPGA: An IWT Approach. Wiley.
MLA (9th ed.) CitationRamalingam, Balakrishnan, et al. Stego on FPGA: An IWT Approach. Wiley.
Warning: These citations may not always be 100% accurate.